Abstract: An agent control device configured to execute a plurality of agents and including a processor, the processor being configured to store an interruptibility list that stipulates interruptibility of execution for each function of one given agent being executed or for an execution status of the one given agent; request execution of each of the agents at a prescribed trigger, or request execution of another given agent at a specific trigger, reference the interruptibility list in order to set permissibility information relating to executability of the other given agent in conjunction with execution of the one given agent; and perform management such that, in a case in which there is a request at the specific trigger for execution of the other given agent while the one given agent is executing, the other given agent is executed based on the request.

Abstract: An agent control device configured to execute a plurality of agents and including a processor, the processor being configured to: request execution of each of the agents at a prescribed trigger; store an interruptibility list that stipulates interruptibility of execution for each function of a given agent being executed or for an execution status of the given agent; reference the interruptibility list in order to set permissibility information relating to executability of another one of the agents in conjunction with execution of the given agent; and perform management such that, in a case in which there is a request for execution of the other agent while the given agent is executing and the permissibility information indicates that the other agent is not executable, execution of the given agent continues without responding to the request.

Abstract: An agent system includes: a first server including a first processor including hardware, the first processor being configured to output first content to a terminal device in response to a request from a user; a second server including a second processor including hardware, the second processor being configured to output second content to the terminal device in response to a request from the user; and a third server including a third processor including hardware, the third processor being configured to acquire the second content from the second server when execution of the second content is requested by the user during execution of the first content acquired from the first server, and determine whether to execute the first content and the second content based on a competition processing policy set in advance.

Abstract: An information processing system includes: a first device configured to acquire a user's uttered voice, transfer the user's uttered voice to at least one of a second and a third devices each actualizing a voice interaction agent, when a control command is acquired, convert a control signal based on the acquired control command to a control signal that matches the second device, and transmit the converted control signal to the second device; a second device configured to recognize the uttered voice transferred from the first device, and output, to the first device, a control command regarding a recognition result obtained by recognizing the uttered voice and response data based on the control signal; and a third device configured to recognize the uttered voice transferred from the first device, and output, to the first device, a control command regarding a recognition result obtained by recognizing the uttered voice.

Abstract: A voice recognition supporting device includes a light emitting unit, a sound detecting unit, and an emission control unit configured to determine whether an environment around the sound detecting unit is suitable for recognition of a voice based on a voice level, a noise level, and a threshold value, to change an emission state of the light emitting unit to a first state when it is determined that the environment around the sound detecting unit is suitable for recognition of a voice, and to change the emission state of the light emitting unit to a second state which is different from the first state when it is determined that the environment around the sound detecting unit is not suitable for recognition of a voice.

Abstract: A component-shared information management method for managing information shared by a plurality of components constituting application software, is characterized in that a shared information management means receives a registration request from a processing executing component among the plurality of components, receives a specific type of information from the component and manages the information thus obtained as shared information. By adopting this method, application software in computer systems can be developed more efficiently.

Abstract: A voice encoder using a VOX (voice operated transmission) control has a pitch analyzer and a high-efficiency encoder. When a voiced state is detected in an input audio signal, the input audio signal and pitch information extracted therefrom are encoded by the high-efficiency encoder and transmitted to a voice decoder. When an unvoiced state is detected, the high-efficiency encoder encodes the input audio signal without a gain of the pitch information. The encoded data without using the gain information is transmitted after a post-amble signal to obtain natural background noise.

Abstract: A method of manufacturing a master-slice integrated circuit device, implemented based on a total circuit diagram, including one or more logic blocks, each including a plurality of basic logic blocks such as flip-flops, NAND gates, and the like. The total circuit diagram is reformed by deleting unused basic logic blocks in each of the logic blocks whose output terminals are not used, by deleting unused wirings and other unused basic logic blocks whose output terminals are not connected to any basic logic blocks as a result of the deletion of the basic logic blocks, and by sequentially deleting unused basic logic blocks and unused wirings in the same manner, so as to retain only those basic logic blocks actually used as effective basic logic blocks. The circuit patterns of the master slice integrated circuit device are produced by using the total circuit diagram thus reformed.