Abstract: In a neural network computation circuit that outputs output data according to a result of a multiply-accumulate operation on input data and connection weight coefficients, a computation circuit unit that expresses one connection weight coefficient includes a plurality of selection transistors and a plurality of nonvolatile variable resistance elements. The nonvolatile variable resistance elements each express a weight coefficient with a different weight. Each of the nonvolatile variable resistance elements holds information of an upper digit of an absolute value of a positive weight coefficient, information of a lower digit of the absolute value of the positive weight coefficient, information of an upper digit of an absolute value of a negative weight coefficient, or information of a lower digit of the absolute value of the negative weight coefficient.