Abstract: In a solid-state imaging element that compares a reference signal and a pixel signal with each other, a frame rate is improved. A differential amplifier circuit amplifies a difference in potential between a pair of input nodes and outputs the difference from an output node. A transfer transistor transfers charge from a photoelectric conversion element to a floating diffusion layer. A gate of a source follower transistor is connected to the floating diffusion layer, and a source thereof is connected to one of the pair of input nodes. A measurement unit measures a gate-source voltage of the source follower transistor and supplies a measured value. A correction arithmetic unit arithmetically calculates a correction value for correcting a potential of the other one of the pair of input nodes based on the measured value.

Abstract: To improve a frame rate in a solid-state imaging element that compares a reference signal and a pixel signal. The solid-state imaging element includes a differential amplifier circuit, a transfer transistor, and a source follower circuit. The differential amplifier circuit amplifies a difference between the potentials of a pair of input nodes and outputs the difference from an output node. The transfer transistor transfers charge from a photoelectric conversion element to a floating diffusion layer. The auto-zero transistor short-circuits the floating diffusion layer and the output node in a predetermined period. The source follower circuit supplies a potential to one of the pair of input nodes according to a potential of the floating diffusion layer.

Abstract: A power supply device according to the present disclosure includes a first resistor and a second resistor connected in series between an output terminal and a reference potential; a power converter connected to the output terminal and a reference point between the first resistor and the second resistor, configured to supply a first voltage to the output terminal, and configured to control the first voltage to cause a second voltage generated at the reference point, to have a predetermined value; a protective current output circuit configured to output a protective current depending on an output current supplied to the output terminal and a limit current; and a control circuit to which the protective current is input, the control circuit being configured to draw in, from the reference point, a drawn-in current obtained by subtracting the protective current from a set current depending on a set value.

Abstract: A power supply device according to the present disclosure includes a first resistor and a second resistor connected in series between an output terminal and a reference potential; a power converter connected to the output terminal and a reference point between the first resistor and the second resistor, configured to supply a first voltage to the output terminal, and configured to control the first voltage to cause a second voltage generated at the reference point, to have a predetermined value; a protective current output circuit configured to output a protective current depending on an output current supplied to the output terminal and a limit current; and a control circuit to which the protective current is input, the control circuit being configured to draw in, from the reference point, a drawn-in current obtained by subtracting the protective current from a set current depending on a set value.

Abstract: A signal amplifier includes a pulse width modulator, a level shifter, and a power amplifier. The pulse width modulator is driven by a positive power supply and a negative power supply, and a reference voltage of the pulse width modulator is set to a GND. The power amplifier is driven by a positive power supply, and a reference voltage of the power amplifier is set to a middle value between the positive power supply and the GND. The level shifter shifts a voltage level of a first PWM signal whose high level corresponds to the positive power supply of the pulse width modulator and whose low level corresponds to the negative power supply of the pulse width modulator, to a voltage level of a second PWM signal whose high level corresponds to the positive power supply of the power amplifier and whose low level corresponds to the GND.

Abstract: A signal amplifier includes a pulse width modulator, a level shifter, and a power amplifier. The pulse width modulator is driven by a positive power supply and a negative power supply, and a reference voltage of the pulse width modulator is set to a GND. The power amplifier is driven by a positive power supply, and a reference voltage of the power amplifier is set to a middle value between the positive power supply and the GND. The level shifter shifts a voltage level of a first PWM signal whose high level corresponds to the positive power supply of the pulse width modulator and whose low level corresponds to the negative power supply of the pulse width modulator, to a voltage level of a second PWM signal whose high level corresponds to the positive power supply of the power amplifier and whose low level corresponds to the GND.

Abstract: A speaker drive integrated circuit of the present invention includes: a load connection status detecting circuit configured to cause a current to flow from an external power supply to one of output terminals when an output side of an amplifying circuit is set to a high impedance state and detect whether a load connection status is normal, open, or short based on a voltage generated at the output terminal; and a transmitting terminal through which a signal indicating a detection result by the load connection status detecting circuit is output to outside.

Abstract: The semiconductor integrated circuit includes a constant voltage regulator 3 generating a predetermined constant voltage from an external power supply 16, an inverting charge pump circuit 2 using the output of the constant voltage regulator as its power supply, and an amplifier circuit 4 using the negative voltage outputted by the charge pump circuit as a reference voltage. The output voltage of the constant voltage regulator is set so that a potential difference between the output voltage of the constant voltage regulator and the output voltage of the charge pump circuit is not to exceed a withstand voltage of the amplifier circuit, and power is supplied to the constant voltage regulator and amplifier circuit from a single external power supply. Even if the voltage of the external power supply increases, the negative voltage output of the charge pump circuit does not change, permitting an increase in the maximum value of the external power supply voltage with account taken of the withstand voltage.

Abstract: While a charge pump activation/deactivation control circuit is outputting a high level signal, MOS transistors for short-circuiting a flying capacitor are off, and the charge pump circuit operates normally. When the charge pump activation/deactivation control circuit outputs a low level signal, the MOS transistors for short-circuiting the flying capacitor are turned on, and the charge pump circuit is deactivated. Consequently, the voltages at the terminals of the flying capacitor are the same and the charge charged therein is discharged. Therefore, when the charge pump circuit is activated again, the initial amount of charge charged to the flying capacitor is zero. Consequently, no large current flows through an output capacitor in the first discharging cycle after the re-activation.

Abstract: The semiconductor integrated circuit includes a constant voltage regulator 3 generating a predetermined constant voltage from an external power supply 16, an inverting charge pump circuit 2 using the output of the constant voltage regulator as its power supply, and an amplifier circuit 4 using the negative voltage outputted by the charge pump circuit as a reference voltage. The output voltage of the constant voltage regulator is set so that a potential difference between the output voltage of the constant voltage regulator and the output voltage of the charge pump circuit is not to exceed a withstand voltage of the amplifier circuit, and power is supplied to the constant voltage regulator and amplifier circuit from a single external power supply. Even if the voltage of the external power supply increases, the negative voltage output of the charge pump circuit does not change, permitting an increase in the maximum value of the external power supply voltage with account taken of the withstand voltage.

Abstract: While a charge pump activation/deactivation control circuit is outputting a high level signal, MOS transistors for short-circuiting a flying capacitor are off, and the charge pump circuit operates normally. When the charge pump activation/deactivation control circuit outputs a low level signal, the MOS transistors for short-circuiting the flying capacitor are turned on, and the charge pump circuit is deactivated. Consequently, the voltages at the terminals of the flying capacitor are the same and the charge charged therein is discharged. Therefore, when the charge pump circuit is activated again, the initial amount of charge charged to the flying capacitor is zero. Consequently, no large current flows through an output capacitor in the first discharging cycle after the re-activation.