Patents by Inventor Satoshi Gomi
Satoshi Gomi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11823877Abstract: According to one embodiment of the present disclosure, there is provided a substrate processing system for processing a plurality of substrates including: a processor configured to perform a process on the substrate; a transport device configured to repeatedly transport the plurality of substrates with respect to the processor; and a controller configured to control the process of the substrate in the processor, wherein the controller is configured to: execute the process based on a process recipe, which is a control program for executing the process; and set an offset time, which is a function corresponding to a number of the substrates processed by the processor or a function corresponding to a parameter equivalent to the number of the processed substrates, with respect to a step time for a step of the process recipe.Type: GrantFiled: March 22, 2021Date of Patent: November 21, 2023Assignee: Tokyo Electron LimitedInventors: Koichi Miyashita, Makoto Horikawa, Satoshi Gomi
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Patent number: 11276592Abstract: A processing apparatus for processing a substrate includes: a plurality of end devices; a low-level controller configured to control specific end devices among the plurality of end devices; and a module controller configured to execute a recipe for processing the substrate, to specify control steps satisfying a specific condition among a plurality of control steps of the recipe, and to transmit the specified control steps to the low-level controller, wherein the low-level controller controls the specific end devices based on the control steps received from the module controller.Type: GrantFiled: April 2, 2020Date of Patent: March 15, 2022Assignee: TOKYO ELECTRON LIMITEDInventors: Katsuhito Hirose, Koichi Miyashita, Hiroshi Hirose, Satoshi Gomi, Yasunori Kumagai, Takashi Yoshiyama
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Publication number: 20210305029Abstract: According to one embodiment of the present disclosure, there is provided a substrate processing system for processing a plurality of substrates including: a processor configured to perform a process on the substrate; a transport device configured to repeatedly transport the plurality of substrates with respect to the processor; and a controller configured to control the process of the substrate in the processor, wherein the controller is configured to: execute the process based on a process recipe, which is a control program for executing the process; and set an offset time, which is a function corresponding to a number of the substrates processed by the processor or a function corresponding to a parameter equivalent to the number of the processed substrates, with respect to a step time for a step of the process recipe.Type: ApplicationFiled: March 22, 2021Publication date: September 30, 2021Inventors: Koichi MIYASHITA, Makoto HORIKAWA, Satoshi GOMI
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Publication number: 20200328100Abstract: A processing apparatus for processing a substrate includes: a plurality of end devices; a low-level controller configured to control specific end devices among the plurality of end devices; and a module controller configured to execute a recipe for processing the substrate, to specify control steps satisfying a specific condition among a plurality of control steps of the recipe, and to transmit the specified control steps to the low-level controller, wherein the low-level controller controls the specific end devices based on the control steps received from the module controller.Type: ApplicationFiled: April 2, 2020Publication date: October 15, 2020Inventors: Katsuhito HIROSE, Koichi MIYASHITA, Hiroshi HIROSE, Satoshi GOMI, Yasunori KUMAGAI, Takashi YOSHIYAMA
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Publication number: 20160307784Abstract: A substrate processing system includes a processing unit having one or more processing chambers each of which includes a mounting table configured to mount thereon a substrate and is configured to perform predetermined processing on the substrate, a loading/unloading unit configured to load/unload a substrate container accommodating a plurality of substrates, one or more transfer units configured to transfer a substrate between the loading/unloading unit and the processing chambers, and a control unit configured to control the processing unit, the loading/unloading unit and the transfer units. The control unit controls a simulated operation, which does not include the predetermined processing in the processing chamber, to be performed on a plurality of dummy substrates in parallel. The simulated operation is a simulated transfer operation of the dummy substrates and includes a operation without transferring the dummy substrates from the loading/unloading unit into the processing chamber.Type: ApplicationFiled: April 19, 2016Publication date: October 20, 2016Inventors: Satoshi GOMI, Daisuke MORISAWA, Keiji OSADA
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Patent number: 9223305Abstract: A semiconductor manufacturing system includes circuitry configured to execute: displaying a screen for selecting an inspection set including inspection items having a manipulation item and/or a check item; retrieving the inspection items, arranging the inspection items in the order of workflow, and displaying each inspection item on a screen with an execution attribute indicating whether each inspection item is “automatic” or “manual” execution; receiving an inspection start command and reading the first inspection item from a storage unit. The circuitry also executes steps corresponding to the following cases (a) to (d) until there are no more inspection items: (a) the read-out inspection item being the manipulation item and “automatic”; (b) the read-out inspection item being the manipulation item and “manual”; (c) the read-out inspection item being the check item and “automatic”; and (d) the read-out inspection item being the check item and “manual”.Type: GrantFiled: September 14, 2012Date of Patent: December 29, 2015Assignee: TOKYO ELECTRON LIMITEDInventors: Gaku Ikeda, Koichi Miyashita, Takamasa Chikuma, Satoshi Gomi, Chunmui Li, Kunio Takano
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Publication number: 20140042153Abstract: A microwave processing method for processing an object in a processing chamber is probided by using microwaves. The method includes loading the object into the processing chamber in a state where a pressure in the processing chamber is higher than that of an outside environment; discharging O2 gas from the processing chamber by introducing N2 gas into the processing chamber; performing heat treatment on the object by introducing microwaves into the processing chamber from which the O2 gas has been discharged; and cooling the object in a state where the pressure in the chamber is higher than that of the outside environment.Type: ApplicationFiled: August 2, 2013Publication date: February 13, 2014Applicant: TOKYO ELECTRON LIMITEDInventors: Kouji Shimomura, Yoshiro Kabe, Taichi Monden, Jun Yamashita, Kunio Takano, Satoshi Gomi
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Patent number: 8581153Abstract: A method of detecting an abnormal placement of a substrate W, which is carried out when a substrate W placed on a substrate table 3, in which a heater 6a, 6b is disposed, is processed by heating. The method of detecting an abnormal placement of the substrate comprises the steps of: during processing of the substrate W, based on information about an electric output to the heater 6a, 6b or information about a measured temperature of the substrate table 3, detecting of a maximum value and a minimum value of the electric output or the measured temperature, or an integrated value of the electric output or the measured temperature; and judging of the abnormal placement of the substrate based on the maximum value and the minimum value detected, or the integrated value detected.Type: GrantFiled: September 25, 2009Date of Patent: November 12, 2013Assignee: Tokyo Electron LimitedInventors: Takashi Chino, Satoshi Gomi, Koichi Miyashita, Minoru Nagasawa, Yoshie Eda
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Publication number: 20130013240Abstract: A semiconductor manufacturing system includes a program for inspecting a device of the system executing: displaying a screen for selecting an inspection set including inspection items having a manipulation item and/or a check item; retrieving the inspection items, arranging the inspection items in the order of workflow, and displaying each inspection item on a screen with an execution attribute indicating whether each inspection item is “automatic” or “manual” execution; receiving an inspection start command and reading the first inspection item from a storage unit. The program also executes steps corresponding to the following cases (a) to (d) until there are no more inspection items: (a) the read-out inspection item being the manipulation item and “automatic”; (b) the read-out inspection item being the manipulation item and “manual”; (c) the read-out inspection item being the check item and “automatic”; and (d) the read-out inspection item being the check item and “manual”.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Applicant: TOKYO ELECTON LIMITEDInventors: Gaku Ikeda, Koichi Miyashita, Takamasa Chikuma, Satoshi Gomi, Chunmui Li, Kunio Takano
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Publication number: 20110174800Abstract: A method of detecting an abnormal placement of a substrate W, which is carried out when a substrate W placed on a substrate table 3, in which a heater 6a, 6b is disposed, is processed by heating. The method of detecting an abnormal placement of the substrate comprises the steps of: during processing of the substrate W, based on information about an electric output to the heater 6a, 6b or information about a measured temperature of the substrate table 3, detecting of a maximum value and a minimum value of the electric output or the measured temperature, or an integrated value of the electric output or the measured temperature; and judging of the abnormal placement of the substrate based on the maximum value and the minimum value detected, or the integrated value detected.Type: ApplicationFiled: September 25, 2009Publication date: July 21, 2011Applicant: TOKYO ELECTRON LIMITEDInventors: Takashi Chino, Satoshi Gomi, Koichi Miyashita, Minoru Nagasawa, Yoshie Eda