Patents by Inventor Satoshi Hironaka

Satoshi Hironaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124963
    Abstract: An objective of the present invention is to provide a steel sheet having a high strength which can provide excellent appearance quality. The steel sheet has a chemical composition including, in mass %, C: more than 0.030% to 0.145%, Si: 0% to 0.500%, Mn: 0.50% to 2.50%, P: 0% to 0.100%, S: 0% to 0.020%, Al: 0% to 1.000% or less, N: 0% to 0.0100%, and the like, wherein a metal micro-structures consisting of 70 to 95% of ferrite in volume fraction and 5 to 30% of hard phases in volume fraction, and a value X1 obtained by dividing a standard deviation of average Mn concentrations in a rolling direction at ¼ sheet-thickness positions in a sheet thickness direction by an average Mn concentration at the ¼ sheet-thickness positions is 0.025 or less.
    Type: Application
    Filed: February 25, 2022
    Publication date: April 18, 2024
    Applicant: NIPPON STEEL CORPORATION
    Inventors: Satoshi HIRONAKA, Mai NAGANO, Yasuhiro ITO, Takuya TAKAYAMA
  • Publication number: 20240091936
    Abstract: A robot automation system includes circuitry configured to generate a plurality of task patterns that are candidates of a task flow for performing a job including a plurality of tasks by at least one robot. Each of the plurality of task patterns includes a corresponding relationship between the plurality of tasks and the at least one robot. The circuitry is further configured to calculate an estimated cycle time of the job based on a simulation in which the at least one robot performs the plurality of tasks, for each of the plurality of task patterns. The circuitry is further configured to generate, as an operation program, at least one task flow for performing the job by the at least one robot, in response to comparing a preset reference cycle time for the job with the estimated cycle time for each of the plurality of task patterns.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 21, 2024
    Inventors: Wataru WATANABE, Makoto TAKAHASHI, Masahiro GOYA, Tomoaki UCHIDA, Satoshi HIRONAKA
  • Publication number: 20110193734
    Abstract: A signal converter and the like, which can more accurately and stably realize signal conversion between an analog signal and a digital signal are proposed. In a ?-encoder, when a logic value generated by at least a quantizer 7 is 1, a signal generation unit 11 generates a feedback signal from an amplified signal generated by an amplifier 5 and a power source signal generated by a power source 9, and the signal generation unit 11 adds the feedback signal to an input signal. Therefore, for example, the ?-encoder having robustness to fluctuation of a quantizer 7 can be realized. Further, the more-stable ?-encoder can be realized by a negative ?-encoder that generates the feedback signal using a signal obtained by inverting a sign of the amplified signal. Optimum designs of the amplifier 5 and power source 9 can also be realized.
    Type: Application
    Filed: August 21, 2009
    Publication date: August 11, 2011
    Applicants: JAPAN SCIENCE AND TECHNOLOGY AGENCY, KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION
    Inventors: Satoshi Hironaka, Tohru Kohda, Kazuyuki Aihara
  • Patent number: 7994952
    Abstract: Provided is a highly accurate converter and the like that makes up for the instability of circuit elements, by focusing on a relationship between the Markov chain and ? conversion. A converter 1 that determines the decoded value of a sample value x based on L-bit number bi (i=1, . . . , L) includes a decoding section 3 to determine the decoded value xD for ?=1/? (where 1<?<2) using equation (eq 1). Further, the converter 1 also includes a matrix estimation section 5 to determine the Markov transition matrix based on bi. Unlike a conventional method that pays attention to the lower limit of an interval, the decoding section 3 using equation (eq 1) pays attention to the center of the interval, and this point is a significant difference. x D = ? i = 1 L ? b i ? ? i + ? L + 1 2 ? ( 1 - ? ) .
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: August 9, 2011
    Assignees: Japan Science and Technology Agency, Kyushu University, National University Corporation
    Inventors: Satoshi Hironaka, Tohru Kohda, Kazuyuki Aihara
  • Publication number: 20100207796
    Abstract: Provided is a highly accurate converter and the like that makes up for the instability of circuit elements, by focusing on a relationship between the Markov chain and ? conversion. A converter 1 that determines the decoded value of a sample value x based on L-bit number bi (i=1, . . . , L) includes a decoding section 3 to determine the decoded value xD for ?=1/? (where 1<?<2) using equation (eq1). Further, the converter 1 also includes a matrix estimation section 5 to determine the Markov transition matrix based on bi. Unlike a conventional method that pays attention to the lower limit of an interval, the decoding section 3 using equation (eq1) pays attention to the center of the interval, and this point is a significant difference. x D = ? i = 1 L ? b i ? ? i + ? L + 1 2 ? ( 1 - ? ) .
    Type: Application
    Filed: July 17, 2008
    Publication date: August 19, 2010
    Applicants: JAPAN SCIENCE AND TECHNOLOGY AGENCY, KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION
    Inventors: Satoshi Hironaka, Tohru Kohda, Kazuyuki Aihara