Patents by Inventor Satoshi Ikei

Satoshi Ikei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120256573
    Abstract: A data processing apparatus that controls an inverter circuit for a motor. The data processing apparatus including a control unit that monitors a potential of a power supply terminal to supply power to the inverter circuit, and obtains an information indicative of an amount of a driving current flowing in a motor winding of the motor in response to an amount of a current flowing in a resistive element included in the inverter circuit, to control a driving of the motor. The control unit makes the motor winding and the resistive element form a loop circuit, when the potential of the power supply terminal exceeds a predetermined value.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 11, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Satoshi Ikei
  • Patent number: 8237396
    Abstract: A motor driving device includes a first power supply terminal, a second power supply terminal, a drive unit that is coupled to the first power supply terminal, the second power supply terminal, and a motor winding, a control unit that controls the drive unit, and a resistive element that is coupled between the drive unit and the first power supply terminal. The control unit makes the motor winding and the resistive element form a loop circuit when a voltage between the first power supply terminal and the second power supply terminal exceeds a predetermined value.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: August 7, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Satoshi Ikei
  • Patent number: 8217602
    Abstract: Provided is a motor driving apparatus including a motor drive unit including a plurality of transistors which are repeatedly turned on and off in response to a pulse having a pulse width modulated at a first carrier frequency to control driving of a motor in a normal operation state and which supply a drive current to the motor; and a control unit that controls the plurality of transistors to be turned on and off in response to a pulse having a pulse width modulated at a second carrier frequency higher than the first carrier frequency, when a voltage applied between input terminals of the motor drive unit rises to a predetermined value.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: July 10, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Satoshi Ikei
  • Publication number: 20100013422
    Abstract: Provided is a motor driving apparatus including a motor drive unit including a plurality of transistors which are repeatedly turned on and off in response to a pulse having a pulse width modulated at a first carrier frequency to control driving of a motor in a normal operation state and which supply a drive current to the motor; and a control unit that controls the plurality of transistors to be turned on and off in response to a pulse having a pulse width modulated at a second carrier frequency higher than the first carrier frequency, when a voltage applied between input terminals of the motor drive unit rises to a predetermined value.
    Type: Application
    Filed: July 7, 2009
    Publication date: January 21, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Satoshi Ikei
  • Publication number: 20090309523
    Abstract: A motor driving device includes a first power supply terminal, a second power supply terminal, a drive unit that is coupled to the first power supply terminal, the second power supply terminal, and a motor winding, a control unit that controls the drive unit, and a resistive element that is coupled between the drive unit and the first power supply terminal. The control unit makes the motor winding and the resistive element form a loop circuit when a voltage between the first power supply terminal and the second power supply terminal exceeds a predetermined value.
    Type: Application
    Filed: June 3, 2009
    Publication date: December 17, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Satoshi Ikei
  • Patent number: 5715435
    Abstract: In a trace control circuit for an emulation system, a program fetch signal is generated on the basis of a CPU read signal and a CPU program fetch status signal, both generated from the CPU included in the trace control circuit, and then, is thinned out at an arbitrary proportion so as to generate a trace memory write signal to a trace memory, so that a trace imformation outputted from the CPU is stored in a trace memory in response to the trace memory write signal thus generated. Accordingly, the memory capacity of the trace memory can be apparently increased.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: February 3, 1998
    Assignee: NEC Corporation
    Inventor: Satoshi Ikei
  • Patent number: 5367436
    Abstract: In a probe terminating apparatus, ground terminals, power supply terminals, and open terminals are provided on a print circuit board, and a ground potential applying terminal and a power supply voltage applying terminal are also provided on the print circuit board. In addition, a pull-down resistance apparatus is inserted to be connected between each of the ground terminals and the ground potential applying terminal, and a pull-up resistance apparatus is inserted to be connected between each of the power supply terminals and the power supply voltage applying terminal. Terminals of an evaluation microcomputer in an in-circuit emulator are connected to the ground terminals, the power supply terminals, and the open terminals by the connection of a probe and an IC socket, or connectors. The probe is connected to the terminals of the evaluation microcomputer, and the IC socket is connected to the ground, power supply and open terminals of the probe terminating apparatus.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: November 22, 1994
    Assignee: NEC Corporation
    Inventor: Satoshi Ikei