Patents by Inventor Satoshi Itoi
Satoshi Itoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 6154867Abstract: A data-reproducing device includes: a subtraction absolute value circuit for calculating a substraction absolute value from pre-equalized reproduce data and estimate data output from RAM, outputting the subtraction absolute value as branchmetrics; a comparison and selection circuit for comparing addition values of the branchmetrics and previously calculated pathmetrics are added, selecting a smaller one of the values as the result of comparison, outputting the smaller one of the values as new pathmetric as well as a selection signal as to which of the values is selected; a path memory circuit for storing the selection signal, obtaining the most probable path by unifying paths, outputting the most probable data according to the most probable path; a RAM circuit for outputting estimate data judged to be closest to the pre-equalized reproduce data by using a present output of the path memory circuit as an address; and a data correction circuit for renewing an internal data of the RAM circuit based upon a data obType: GrantFiled: March 4, 1998Date of Patent: November 28, 2000Assignee: NEC CorporationInventor: Satoshi Itoi
-
Data-reproducing device that detects equalization in the presence of pre-equalization data variation
Patent number: 6098193Abstract: A data-reproducing device is provided that, even when pre-equalization characteristics are varied, conducts an equalization detection operation. The device comprises a subtraction absolute value circuit for calculating a subtraction absolute value, a comparison and selection circuit that outputs a selection signal to show which path is selected, a circuit that stores an estimate of the pre-equalized data, an address generating circuit that provides estimate data needed by the subtraction absolute value circuit as determined by the selection signal, a path memory circuit for storing the selection signal output and outputting the most probable data, and a correction control circuit for renewing the estimate data of the estimate data storing circuit.Type: GrantFiled: March 5, 1998Date of Patent: August 1, 2000Assignee: NEC CorporoationInventor: Satoshi Itoi -
Patent number: 6035044Abstract: A scrambling type video transmitting/receiving method feasible for digital television broadcasting and an apparatus therefor are disclosed. A video transmitter executes soft scrambling with an original video signal before compressing it and then sends the softly scrambled video signal. If a video receiver descrambles the scrambled data with a scramble decoder (descrambler), a subscriber having the receiver can enjoy complete video/audio data. However, when an unauthorized person lacking the scramble decoder decodes the descrambled data, the person is allowed to see only some patterns included in a picture. This will successfully encourage the unauthorized person to make subscription so as to enjoy the complete video/audio data.Type: GrantFiled: November 6, 1997Date of Patent: March 7, 2000Assignee: NEC CorporationInventor: Satoshi Itoi
-
Patent number: 6029265Abstract: An error control device includes an error detection code generating section and an error detection section. The error code generating section is arranged in a recording system to generate and add an error detection code to variable-length data. The error detection section is arranged in a reproducing system to perform error detection for reproduced variable-length data on the basis of the error detection code added thereto.Type: GrantFiled: October 9, 1997Date of Patent: February 22, 2000Assignee: NEC CorporationInventors: Satoshi Itoi, Shigeru Araki
-
Patent number: 6014356Abstract: Disclosed is a data-reproducing device which has:means for calculating a subtraction absolute value from a pre-equalized reproduction data and an estimation data and outputting the subtraction absolute value as a branchmetric; means for comparing values that the branchmetric and a previously calculated pathmetric are added, selecting a smaller one of the values as the result of comparing, and outputting the smaller one of the values as a new pathmetric as well as a selection signal as to which of the values is selected; a path memory circuit which stores the selection signal preferably over several stages or tens of stages, obtaining a most possible path by unifying paths, then outputting a most possible data; a storage means for outputting an estimation data judged to be closest to the pre-equalized reproduction data by using a present output of the path memory circuit as an address; and a data correcting means for renewing an internal data of the storage means based upon a data obtained by delaying the pre-Type: GrantFiled: October 3, 1997Date of Patent: January 11, 2000Assignee: NEC CorporationInventor: Satoshi Itoi
-
Patent number: 5995458Abstract: A method of scanning an optical disk having a land area and a groove area arranged in a double spiral configuration is disclosed. Either the land area or the groove area is continuously scanned radially inward or radially outward. The groove area, if the land area is so scanned first, or the land area, if the groove area is so scanned first, is scanned with a track jump repeated outward or inward from the end of the previous scanning. In this manner, one of the land area and groove area is subjected to continuous scanning without any track jump while the other area is subjected to scanning causing a track jump to occur within the same area.Type: GrantFiled: August 29, 1997Date of Patent: November 30, 1999Assignee: NEC CorporationInventor: Satoshi Itoi
-
Patent number: 5938789Abstract: A playback data detecting apparatus comprises a transversal filter 11 for performing partial response equalization, a Viterbi decoding circuit 12 for subjecting the output of the transversal filter 11 to Viterbi decoding, a selected code determination circuit 13 for selecting either (the) (delayed) data of the output of the transversal filter 11 or the output of the Viterbi decoding circuit 12 to determine (the an output corresponding equalization function), a reducing code determination circuit 14 for determining (an output code) by subtracting by the output of the Viterbi decoding circuit 12 (from) (the delayed) data of the output of the transversal filter 11, a (clocked) delaying circuit 15 for delaying the output of the selected code determination circuit 13 and the output of the reducing code determination circuit 14, respectively, and a multiplying coefficient calculating circuit 16 which calculates the optimal multiplying coefficients of the transversal filter 11 for minimizing bit errors from the outpType: GrantFiled: November 27, 1996Date of Patent: August 17, 1999Assignee: NEC CorporationInventor: Satoshi Itoi
-
Patent number: 5590101Abstract: In an optical disk apparatus, an optical disk has clock blocks and rotates at a constant rotational speed. An optical head optically records data on the disk. Data to be recorded is written in a recording buffer memory at a constant bit rate. A recording control section reads out the data from the buffer memory while changing the bit rate for each clock block, and records the data on the disk with an almost constant recording wavelength. A pause track calculator sets a track next to a track defined by R<Nt as a pause track for performing timing adjustment by a pause track operation, with the number of data blocks per track being Nt and R being a constant determined by the capacity of the buffer memory. The pause track calculator notifies the control section of a pause track timing upon setting a track next to a track defined by R<Nt as a pause track.Type: GrantFiled: May 31, 1995Date of Patent: December 31, 1996Assignee: NEC CorporationInventor: Satoshi Itoi
-
Patent number: 5535182Abstract: An optical disk apparatus includes an optical storage medium, an optical head, a head drive section, and a recording data processor. The optical storage medium is rotated at a constant angular velocity. The optical storage medium has a storage area constituted by track areas ranging from the 0th area on the innermost periphery to the nth area on the outermost periphery of the storage area. The track areas are set by dividing the storage area into (n+1) equal areas (n is an integer satisfying n (.gtoreq.1) in the radial direction. The optical head optically records and reproduces recording data on and from the optical storage medium with a constant wave length. The head drive section drives/controls the optical head. The recording data processor generates recording data such that the data amount is increased by .DELTA.Type: GrantFiled: November 4, 1994Date of Patent: July 9, 1996Assignee: NEC CorporationInventor: Satoshi Itoi
-
Patent number: 5519682Abstract: An optical disk recordable on first and second principal surfaces thereof rotates at a constant angular velocity. First and second optical heads positioned over the respective first and second principal surfaces are simultaneously moved along the same or different radiuses by a disk rotating unit for recording data on the optical disk. A head position detector is responsive to track addresses read by the first and second optical heads for outputting head position signals indicative of the distances from the center of the optical disk to the first and second optical heads. A control clock generator determines the ratio of linear velocities of tracks where the first and second optical heads are positioned, and generates control clock signals having respective bit rates depending on the linear velocity ratio. Based on the control clock signals, a data distributor distributes image data and non-image data such as audio and control data to the first and second optical heads.Type: GrantFiled: July 15, 1994Date of Patent: May 21, 1996Assignee: NEC CorporationInventors: Satoshi Itoi, Shigeru Araki
-
Patent number: 5510904Abstract: Video data is compressed according to a bit rate to be subdivided into data blocks each having a predetermined number of bits. The blocks are sent to a shuffling circuit to undergo a shuffling predetermined for the circuit. To concentrate errors onto a portion of the shuffled video data, the data is delivered to an inverse shuffled circuit to be subjected to an inverse shuffling so as to restore the data undergone a shuffling predetermined for a recording or transmitting apparatus, thereby transmitting the resultant compressed data to a D-2 VTR. This possibly reduces the interpolation probability on the screen and disperses the data. Even at occurrence of a burst error exceeding a correction capacity, propagation of the error can be minimized.Type: GrantFiled: February 23, 1994Date of Patent: April 23, 1996Assignee: NEC CorporationInventor: Satoshi Itoi
-
Patent number: 5511080Abstract: In a Viterbi decoding method, there are four playback states which are state S0, state S1, state S2, and state S3. When the signal e(t) that violates the predetermined state transition rules is inputted, bit error correction is performed by detecting the incorrect state and determined the original state. According to the predetermined state transition rules, for example, when the signal e(t) of "-1" is inputted during state S0, it makes a transition to state S0 and the value of the output signal f(t) is made "0".Type: GrantFiled: May 28, 1993Date of Patent: April 23, 1996Assignee: NEC CorporationInventors: Satoshi Itoi, Shigeru Araki
-
Patent number: 5455683Abstract: A method of recording a sequence of video blocks, each comprising a plurality of bytes, each representing compressed image data code, includes the step of recording a video block identification signal after recording a synchronization signal in each of a plurality sync blocks. Then video data codes are recorded adjacent the video block identification signal. This is followed by a connection code being recorded adjacent the video data codes in the video blocks. The video block identification signal recorded between the synchronization signal and the video data codes contains a coded combination of bits for defining the position of first bit or byte of a new video block in the video data area.Type: GrantFiled: September 24, 1993Date of Patent: October 3, 1995Assignee: NEC CorporationInventor: Satoshi Itoi
-
Patent number: 5005190Abstract: A window system synchronizing protective circuit. A window forming circuit forming windows having a predetermined position which detect the forthcoming synchronizing signal in accordance with a counted value of bit clock pulses produced by a bit clock. The window forming circuit forms a corresponding number of windows to a predetermined number of bit clock pulses before and after detecting a synchronizing signal. The window forming circuit generates a window signal. A protective synchronizing circuit which has the detected synchronizing signal and the window signal generates a protective signal which has a phasic relation to the detected synchronizing signal. If no synchronizing signal has been detected in the windows the protective synchronizing signal is output. If the synchronizing signal has not been detected after a predetermined period a window reset circuit changes the position of the windows.Type: GrantFiled: November 30, 1988Date of Patent: April 2, 1991Assignee: NEC Home Electronics Ltd.Inventor: Satoshi Itoi