Patents by Inventor Satoshi Kawai
Satoshi Kawai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240118637Abstract: An electrophotographic photoreceptor includes a conductive substrate, an undercoat layer provided on the conductive substrate, a charge generation layer provided on the undercoat layer, a charge transport layer provided on the charge generation layer, and a surface protective layer provided on the charge transport layer, in which a dark decay is 85 V/sec or greater in a case where the electrophotographic photoreceptor is contact-charged with a DC voltage.Type: ApplicationFiled: August 7, 2023Publication date: April 11, 2024Applicant: FUJIFILM Business Innovation Corp.Inventors: Satoshi MIZOGUCHI, Takeshi KAWAI, Masaki HIRAKATA, Yuki YONETOKU, Hideya KATSUHARA
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Patent number: 11932263Abstract: A travel sickness estimation system includes an estimation unit and an output unit. The estimation unit is configured to perform estimation processing of estimating, based on person information indicating conditions of a person who is on board a moving vehicle, whether or not the person is in circumstances that would cause travel sickness for him or her. The output unit is configured to output a result of the estimation processing performed by the estimation unit.Type: GrantFiled: March 13, 2019Date of Patent: March 19, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yuta Moriura, Yoshitaka Nakamura, Yasufumi Kawai, Hiroyuki Handa, Yohei Morishita, Toru Okino, Hiroyuki Hagino, Toru Sakuragawa, Satoshi Morishita
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Publication number: 20230366363Abstract: A cylinder block is provided. A water jacket spacer is disposed inside a water jacket of the cylinder block. The water jacket includes a first passage connecting an inlet to a discharge section, and a second passage connecting the inlet to the discharging portion. The first passage is shorter than the second passage. A spacer plate of the water jacket spacer is provided with a restricting portion. The restricting portion is located in the first passage. A width dimension of the restricting portion is larger than a width dimension in a cylinder-radial direction of the spacer plate, the cylinder-radial direction being a radial direction of the cylinder. A width dimension of the restricting portion is smaller than a width dimension in the cylinder-radial direction of the water jacket.Type: ApplicationFiled: May 8, 2023Publication date: November 16, 2023Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Satoshi KAWAI, Tomoaki SUZUKI
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Patent number: 11776401Abstract: A boarding position setting method, a boarding position setting device, and a boarding position setting system are provided. The boarding position setting method, the boarding position setting device, and the boarding position setting system each recognizes a stop position of a vehicle based on vehicle information, determines whether the stop position is suitable for boarding based on a stop time of the vehicle or occurrence of a boarding event of the vehicle at the stop position, stores the stop position determined to be suitable for boarding as a boarding position in the vehicle dispatch service, acquires a first vehicle dispatch request to the vehicle dispatch service and sets the boarding position based on the first vehicle dispatch request from among stored boarding positions.Type: GrantFiled: May 13, 2019Date of Patent: October 3, 2023Assignees: Nissan Motor Co., Ltd., Renault S.A.S.Inventors: Naoki Kojo, Satoshi Kawai
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Publication number: 20230134559Abstract: Provided are a high-frequency power supply device and an output control method therefor which are capable of constantly keeping the phase of the outputted high-frequency pulse uniform even in a structure in which the synchronizing pulse and the clock pulse are generated separately.Type: ApplicationFiled: March 4, 2021Publication date: May 4, 2023Applicant: KYOSAN ELECTRIC MFG. CO., LTD.Inventors: Takeshi Fujiwara, Hiroyuki Kojima, Satoshi Kawai
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Publication number: 20220178709Abstract: A dispatched vehicle extraction server, a dispatched vehicle extraction device, and a dispatched vehicle extraction method perform: acquiring a dispatching request, a user position and a vehicle position of a dispatched vehicle at the time of the dispatching request; calculating a time the user spends moving from the user position to a meeting site of the dispatched vehicle, calculating a time the user spends waiting, calculating a total time that would be spent by the user from when the user makes the dispatching request until the user arrives at an intended location by boarding the dispatched vehicle; extracting the dispatched vehicle that satisfies constraints relating to the total time and the time would be spent waiting according to the user attribute information at the proposed meeting sites; and outputting a combination of each of the proposed meeting sites and the dispatched vehicle.Type: ApplicationFiled: March 29, 2019Publication date: June 9, 2022Inventors: Tatsuyuki NAKAJIMA, Satoshi KAWAI, Yohei KANEKO
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Publication number: 20210256847Abstract: A boarding position setting method, a boarding position setting device, and a boarding position setting system are provided. The boarding position setting method, the boarding position setting device, and the boarding position setting system each recognizes a stop position of a vehicle based on vehicle information, determines whether the stop position is suitable for boarding based on a stop time of the vehicle or occurrence of a boarding event of the vehicle at the stop position, stores the stop position determined to be suitable for boarding as a boarding position in the vehicle dispatch service, acquires a first vehicle dispatch request to the vehicle dispatch service and sets the boarding position based on the first vehicle dispatch request from among stored boarding positions.Type: ApplicationFiled: May 13, 2019Publication date: August 19, 2021Inventors: Naoki KOJO, Satoshi KAWAI
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Patent number: 11054066Abstract: The present invention provides a hose excellent in mechanical properties at high temperatures. The hose of the present invention comprises a cross-linked fluororubber layer obtainable by cross-linking a fluororubber composition containing a fluororubber (A) and a carbon black (B). The cross-linked fluororubber layer has a loss modulus E? of 400 kPa or higher and 6,000 kPa or lower determined by a dynamic viscoelasticity test (measurement temperature: 160° C., tensile strain: 1%, initial force: 157 cN, frequency: 10 Hz).Type: GrantFiled: August 25, 2011Date of Patent: July 6, 2021Assignee: DAIKIN INDUSTRIES, LTD.Inventors: Junpei Terada, Daisuke Ota, Masanori Kitaichi, Yutaka Ueta, Shigeru Morita, Kazuyoshi Kawasaki, Tatsuya Morikawa, Satoshi Kawai, Shoji Fukuoka
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Patent number: 10594220Abstract: A chopper section of a power supply device includes a plurality of step-down chopper circuits, and multiphase control of the step-down chopper circuits is performed using gate signals having phases displaced from each other. This shortens the period with which output signals of the step-down chopper circuits are changed. Shortening the period reduces the amount of jitter resulting from a gap between the occurrence of a command signal and a sampling point that is a point in time at which a gate signal is generated. The number of phases of the gate signals equals the number of phases of the step-down chopper circuits. The control of the gate signal generator is asynchronous to feedback control by the controller. Points in time (sampling points) at which gate signals are generated are points in time of generation (sampling points) after a point in time at which the controller calculates a manipulated value.Type: GrantFiled: February 23, 2017Date of Patent: March 17, 2020Assignee: KYOSAN ELECTRIC MFG. CO., LTD.Inventors: Itsuo Yuzurihara, Takeshi Fujiwara, Ryosuke Ohma, Hiroshi Kunitama, Satoshi Kawai, Ryota Suzuki
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Publication number: 20190341851Abstract: A chopper section of a power supply device includes a plurality of step-down chopper circuits, and multiphase control of the step-down chopper circuits is performed using gate signals having phases displaced from each other. This shortens the period with which output signals of the step-down chopper circuits are changed. Shortening the period reduces the amount of jitter resulting from a gap between the occurrence of a command signal and a sampling point that is a point in time at which a gate signal is generated. The number of phases of the gate signals equals the number of phases of the step-down chopper circuits. The control of the gate signal generator is asynchronous to feedback control by the controller. Points in time (sampling points) at which gate signals are generated are points in time of generation (sampling points) after a point in time at which the controller calculates a manipulated value.Type: ApplicationFiled: February 23, 2017Publication date: November 7, 2019Applicant: KYOSAN ELECTRIC MFG. CO., LTD.Inventors: Itsuo Yuzurihara, Takeshi Fujiwara, Ryosuke Ohma, Hiroshi Kunitama, Satoshi Kawai, Ryota Suzuki
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Patent number: 10253684Abstract: An internal combustion engine control apparatus includes a secondary air supply device having a secondary air supply passage that supplies secondary air pumped by an air pump into an exhaust system of an internal combustion engine and an opening/closing unit that opens and closes the secondary air supply passage. A controller provided in the internal combustion engine control apparatus sets the opening/closing unit in an open condition such that the secondary air is supplied to the secondary air supply passage, and then executes foreign matter removal control in which the opening/closing unit is opened and closed. As a result, foreign matter caught in an ASV during AI control is removed immediately. By implementing OBD after removing the foreign matter, detection of an open sticking abnormality caused by foreign matter caught in the ASV is suppressed.Type: GrantFiled: August 6, 2012Date of Patent: April 9, 2019Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Shinya Kondo, Ryosuke Tsukamoto, Hironori Kitadani, Jun Aoki, Shinsuke Kiyomiya, Kazuyoshi Tashiro, Satoshi Kawai, Tatsuro Nakata
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Patent number: 10152885Abstract: A vehicle guidance device has a stopping vehicle detector configured to detect stopping vehicles failing to pass through a traffic light while a light is green, the traffic light being installed beside a plurality of lanes extending in a same direction, an information acquisition unit configured to acquire a starting characteristic of each detected vehicle, and a simultaneous passage line calculator configured to calculate a simultaneous passage line including a first line and a second line based on the acquired starting characteristics, when a vehicle having a lower starting characteristic than a reference starting characteristic is included in the vehicles stopping on a first lane included in the plurality of lanes, and when a vehicle having a higher starting characteristic than starting characteristics of the vehicles on the first lane is included in the vehicles stopping on a second lane included in the plurality of lanes.Type: GrantFiled: April 21, 2015Date of Patent: December 11, 2018Assignee: NISSAN MOTOR CO., LTD.Inventors: Seiji Shimodaira, Hiroya Fujimoto, Junichi Kasai, Yasuhisa Kishi, Satoshi Kawai
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Publication number: 20180158330Abstract: A vehicle guidance device has a stopping vehicle detector configured to detect stopping vehicles failing to pass through a traffic light while a light is green, the traffic light being installed beside a plurality of lanes extending in a same direction, an information acquisition unit configured to acquire a starting characteristic of each detected vehicle, and a simultaneous passage line calculator configured to calculate a simultaneous passage line including a first line and a second line based on the acquired starting characteristics, when a vehicle having a lower starting characteristic than a reference starting characteristic is included in the vehicles stopping on a first lane included in the plurality of lanes, and when a vehicle having a higher starting characteristic than starting characteristics of the vehicles on the first lane is included in the vehicles stopping on a second lane included in the plurality of lanes.Type: ApplicationFiled: April 21, 2015Publication date: June 7, 2018Applicant: NISSAN MOTOR CO., LTD.Inventors: Seiji Shimodaira, Hiroya Fujimoto, Junichi Kasai, Yasuhisa Kishi, Satoshi Kawai
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Patent number: 9972729Abstract: A p? type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p? type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p? type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p? type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.Type: GrantFiled: February 16, 2017Date of Patent: May 15, 2018Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuhisa Yamamura, Akira Sakamoto, Terumasa Nagano, Yoshitaka Ishikawa, Satoshi Kawai
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Publication number: 20170162726Abstract: A p? type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p? type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p? type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p? type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.Type: ApplicationFiled: February 16, 2017Publication date: June 8, 2017Inventors: Kazuhisa YAMAMURA, Akira SAKAMOTO, Terumasa NAGANO, Yoshitaka ISHIKAWA, Satoshi KAWAI
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Patent number: 9614109Abstract: A p? type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p? type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p? type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p? type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.Type: GrantFiled: April 10, 2015Date of Patent: April 4, 2017Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuhisa Yamamura, Akira Sakamoto, Terumasa Nagano, Yoshitaka Ishikawa, Satoshi Kawai
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Publication number: 20160186351Abstract: The purpose of the present invention is to provide a replenisher that avoids an increase in the HF concentration in a surface-treatment liquid for metal materials, is capable of supplying zirconium ions at high concentration by using the metal material surface-treatment liquid, and has excellent long-term storage stability, in order to continuously chemically convert and/or electrolytically treat a metal material. This replenisher contains prescribed amounts of: a zirconium compound not containing fluorine and including at least one type selected from a group comprising zirconium basic carbonate, zirconium carbonate, zirconium hydroxide, and ammonium zirconium carbonate; a fluorine-containing matter including at least one type selected from a group comprising hydrofluoric acid, a hydrofluoric acid salt, fluorozirconic acid, and a fluorozirconic acid salt; and an acid component including at least one type selected from a group comprising nitric acid, hydrochloric acid, sulfuric acid, and acetic acid.Type: ApplicationFiled: May 28, 2013Publication date: June 30, 2016Inventors: Satoshi KAWAI, Yoshiyuki KAWADE
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Patent number: 9190551Abstract: A p? type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p? type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p? type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p? type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.Type: GrantFiled: February 15, 2010Date of Patent: November 17, 2015Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuhisa Yamamura, Akira Sakamoto, Terumasa Nagano, Yoshitaka Ishikawa, Satoshi Kawai
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Publication number: 20150214395Abstract: A p? type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p? type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p? type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p? type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.Type: ApplicationFiled: April 10, 2015Publication date: July 30, 2015Inventors: Kazuhisa YAMAMURA, Akira SAKAMOTO, Terumasa NAGANO, Yoshitaka ISHIKAWA, Satoshi KAWAI
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Patent number: 8994135Abstract: A photodiode array PDA1 is provided with a substrate S wherein a plurality of photodetecting channels CH have an n-type semiconductor layer 32. The photodiode array PDA1 is provided with a p? type semiconductor layer 33 formed on the n-type semiconductor layer 32, resistors 24 provided for the respective photodetecting channels CH and each having one end portion connected to a signal conducting wire 23, and an n-type separating portion 40 formed between the plurality of photodetecting channels CH. The p? type semiconductor layer 33 forms pn junctions at an interface to the n-type semiconductor layer 32 and has a plurality of multiplication regions AM for avalanche multiplication of carriers generated with incidence of detection target light, corresponding to the respective photodetecting channels. An irregular asperity 10 is formed in a surface of the n-type semiconductor layer 32 and the surface is optically exposed.Type: GrantFiled: December 23, 2013Date of Patent: March 31, 2015Assignee: Hamamatsu Photonics K.K.Inventors: Kazuhisa Yamamura, Akira Sakamoto, Terumasa Nagano, Yoshitaka Ishikawa, Satoshi Kawai