Abstract: A display apparatus includes a display having a plurality of pixels, and a controller which selects a pattern corresponding to a gradation of gradation data. On-state pixels are added to a pattern corresponding to one gradation of the gradation data to obtain a pattern corresponding to another gradation of the gradation data higher than the one gradation of the gradation data while maintaining unchanged an arrangement of on-state pixels in the pattern corresponding to the one gradation of the gradation data.

Abstract: A liquid crystal display control device is provided with a clock generating circuit for generating, on the basis of a first synchronous signal, a dot clock having a predetermined period, a phase which varies on dot-period basis for every frame period of the first video signal, an input circuit for picking up the first video signal in accordance with the dot clock and outputting digital display data, a frame memory in which the digital display data are stored, and a control circuit for generating a second synchronous signal for a liquid crystal display and reading out the display data stored in the frame memory to generate a second video signal, whereby a series of operations from a pickup operation of the video signal to a display operation of the liquid crystal panel can be performed at a lower speed while suppressing deterioration in quality of display images.

Abstract: A display apparatus includes a display having a plurality of pixels, and a controller which selects a pattern corresponding to a gradation of gradation data. On-state pixels are added to a pattern corresponding to one gradation of the gradation data to obtain a pattern corresponding to another gradation of the gradation data higher than the one gradation of the gradation data while maintaining unchanged an arrangement of on-state pixels in the pattern corresponding to the one gradation of the gradation data.

Abstract: A liquid crystal display control device is provided with a clock generating circuit for generating, on the basis of a first synchronous signal, a 1/n-frequency dot clock whose period is equal to n-times the dot period of a first video signal (n≧2) and whose phase varies on dot-period basis for every frame period of the first video signal, an input circuit for picking up the first video signal in accordance with the 1/n-frequency dot clock and outputting digital display data, a frame memory in which the digital display data are stored, and a control circuit for generating a second synchronous signal for a liquid crystal display and reading out the display data stored in the frame memory to generate a second video signal, whereby a series of operations from a pickup operation of the video signal to a display operation of the liquid crystal panel can be performed at a lower speed while suppressing deterioration in quality of display images.

Abstract: A liquid crystal display control apparatus includes a display on/off data generation circuit for generating plural display on/off data per pixel corresponding to M (M>N, M and N being integers) frame periods of a video output signal in N frame periods of a video input signal on a unit pixel basis in response to gray-scale data of pixel units included in the video input signal, a write control circuit for writing display on/off data per pixel corresponding to M frames of the video output signal generated by the display on/off data generation circuit into a frame memory during N frame periods of the video input signal, and a read control circuit for sequentially reading out, from the frame memory, display on/off data corresponding to M frames of the video output signal written in the frame memory in synchronism with one display scan period of the video output signal, thereby the data written in the frame memory is not gray-scale data but display on/off data of one bit, therefore, a data bus width at a time o

Abstract: A liquid crystal display control device is provided with a clock generating circuit for generating, on the basis of a first synchronous signal, a 1/n-frequency dot clock whose period is equal to n-times the dot period of a first video signal (n≧2) and whose phase varies on dot-period basis for every frame period of the first video signal, an input circuit for picking up the first video signal in accordance with the 1/n-frequency dot clock and outputting digital display data, a frame memory in which the digital display data are stored, and a control circuit for generating a second synchronous signal for a liquid crystal display and reading out the display data stored in the frame memory to generate a second video signal, whereby a series of operations from a pickup operation of the video signal to a display operation of the liquid crystal panel can be performed at a lower speed while suppressing deterioration in quality of display images.

Abstract: A liquid crystal display control apparatus includes a display on/off data generation circuit for generating display on/off data corresponding to M (M>N, M and N being integers) frame periods of a video output signal in N frame periods of a video input signal on a unit pixel basis in response to gray-scale data of pixel units included in the video input signal, a write control circuit for writing display on/off data corresponding to M frames of the video output signal generated by the display on/off data generation circuit into a frame memory during N frame periods of the video input signal, and a read control circuit for sequentially reading out, from the frame memory, display on/off data corresponding to M frames of the video output signal written in the frame memory in synchronism with one display scan period of the video output signal, thereby the data written in the frame memory is not gray-scale data but display on/off data of one bit, therefore, a data bus width at a time of accessing the frame memor

Abstract: A liquid crystal display apparatus including a liquid crystal panel of a plurality of dots, an X drive circuit for supplying display information of at least one line to the liquid crystal panel and a Y drive circuit for selecting one-dot data for each line of the liquid crystal panel, the X drive circuit and the Y drive circuit enabling energization of the liquid crystal panel. A plurality of memories are provided for receiving a plurality of bits of information data and for storing at least M dot display information data so as to enable display of a respective line of the liquid crystal panel, M being an integer.

Abstract: A liquid-crystal display device of a simple matrix type is permitted to present a liquid-crystal display of good display quality free from nonuniformity in display brightness. A method of driving a liquid-crystal display device wherein voltages which correspond to potential differences between scanning voltages from a Y drive circuit and display voltages from an X drive circuit are applied to liquid-crystal cells at intersection points between scanning electrodes (Y electrodes) and data electrodes (X electrodes), thereby presenting a display conforming to display data comprises the steps of providing a correction time period for correcting the display voltage to be output from the X drive circuit at least once every scanning period of one line, and outputting a correction voltage at a voltage level which is intermediate between a voltage level in an ON-display state and a voltage level in an OFF-display state instead of the display voltage from the X drive circuit within the correction time period.

Abstract: A liquid crystal display system capable of making a display of 2.sup.i+j (i, j: positive integers) kinds of tones display includes a frame rate control device for selecting one out of frame rate control data of 2.sup.j kinds in accordance with j-bit display data included in (i+j)-bit display data, i and j being positive integers, a multi-level tone pulse generator for generating display pulses of 2.sup.i +1 kinds including at least activation for display, inactivation for display, and intermediate display corresponding to an intermediate level, and a selection drive device for selecting a display pulse of one kind out of display pulses of 2.sup.i +1 kinds in accordance with the frame rate control data supplied from the frame rate control device and i-bit display data and applying the selected display pulse to a liquid crystal panel, the i-bit being different from the j-bit.

Abstract: Disclosed is a light-sensitive composition which comprises(A) a diazo resin and(B) an alkali-soluble and swellable polymer compound, said polymer compound being a vinyl copolymer containing, as a constitutional unit, 0.1 to 10 mole % of a structure derived from an ester of acrylic acid or methacrylic acid having an alkyl group with 8 or more carbon atoms.

Abstract: A liquid crystal display apparatus in which color display information is converted into information about luminance of liquid crystal display used for driving a liquid crystal so as to provide a liquid crystal display. The apparatus comprises a decider unit for deciding whether the color display information takes a display form pursuant to the dither method, and a converter unit for converting the color display information into liquid crystal luminance display information in accordance with a frame base thin-out method corresponding to the color display information when the decision results indicate that the color display information takes a display form pursuant to the dither method and for converting the color display information in accordance with a dot base thin-out method when the decision results do not indicate the dither method.

Abstract: A liquid crystal display apparatus including a liquid crystal panel of a plurality of dots, an X drive circuit for supplying display information of at least one line to the liquid crystal panel and a Y drive circuit for selecting one-dot data for each line of the liquid crystal panel, the X drive circuit and the Y drive circuit enabling energization of the liquid crystal panel. A plurality of memories are provided for receiving a plurality of bits of information data and for storing at least M dot display information data so as to enable display of a respective line of the liquid crystal panel, M being an integer.

Abstract: In a half tone display driving circuit for a liquid crystal matrix panel, a pulse for half tone display is phase modulated so that pulse signals which are out of phase relative to each other are applied to adjacent columns of the liquid crystal matrix panel, or from the phase-modulated pulse a gray scale pulse (tone pulse) is prepared in which the frequency of occurrence of voltage edges is decreased. The dephased pulse signals or the gray scale pulse (tone pulse) is used to prevent a decrease in brightness of display when the liquid crystal matrix panel is driven for half tone display.

Abstract: A one-dimensional image sensor comprising a solid image pick-up element takes images in sequence, and generates an image signal. Clock pulses from a frequency variable type clock pulse generator having a frequency which varies in correspondence to a control signal are supplied to a one-dimensional image sensor, thereby image signals are outputted in sequence. The image signal is amplified by an amplifier and inputted to a comparator and compared with a reference signal. A frequency variable range of the frequency variable type clock pulse generator is set higher than the cut-off frequency of the amplifier, and the binary level output by the comparator is substantially the same as the image inputted to the one-dimensional image sensor and control is effected by the variable frequency of the clock pulses.