Patents by Inventor Satoshi Michishita

Satoshi Michishita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7138722
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: November 21, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Publication number: 20050146008
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Application
    Filed: February 15, 2005
    Publication date: July 7, 2005
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Patent number: 6900074
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: May 31, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Publication number: 20030209740
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Application
    Filed: April 25, 2003
    Publication date: November 13, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Patent number: 6630731
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: October 7, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Patent number: 6611012
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: August 26, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Patent number: 6492719
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: December 10, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Publication number: 20020117742
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Application
    Filed: January 22, 2002
    Publication date: August 29, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Publication number: 20020089051
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Application
    Filed: January 22, 2002
    Publication date: July 11, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Publication number: 20020038907
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Application
    Filed: October 26, 2001
    Publication date: April 4, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba
  • Patent number: 6335565
    Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: January 1, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Miyamoto, Asao Nishimura, Koki Noguchi, Satoshi Michishita, Masashi Horiguchi, Masaharu Kubo, Kazuyoshi Shiba