Patents by Inventor Satoshi Murakami

Satoshi Murakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160223767
    Abstract: In an optical fiber device (1), a fiber connection unit is provided with a laser light path unit (73) formed into a hollow shape such that a laser light incident on the core (21a) passes through an interior of the laser light path unit, the laser light path unit (73) is provided with a diaphragm unit (73b) formed to have an inner width dimension smaller than an outer width dimension of the core (21a), and a touching portion (73c) formed to have an inner width dimension larger than the outer width dimension of the core (21a) so as to touch a portion outside the core (21a) on an end face on an incident side of the optical fiber unit (2), the touching portion (73c) arranged on an end on a downstream side.
    Type: Application
    Filed: July 24, 2014
    Publication date: August 4, 2016
    Applicant: USHIO DENKI KABUSHIKI KAISHA
    Inventors: Satoshi MURAKAMI, Satoru FUKUDA
  • Patent number: 9406806
    Abstract: A semiconductor having an active layer; a gate insulating film in contact with the semiconductor; a gate electrode opposite to the active layer through the gate insulating film; a first nitride insulating film formed over the active layer; a photosensitive organic resin film formed on the first nitride insulating film; a second nitride insulating film formed on the photosensitive organic resin film; and a wiring provided on the second, nitride insulating film. A first opening portion is provided in the photosensitive organic resin film, an inner wall surface of the first opening portion is covered with the second nitride insulating film, a second opening portion is provided in a laminate including the gate insulating film, the first nitride insulating film, and the second nitride insulating film inside the first opening portion, and the semiconductor is connected with the wiring through the first opening portion and the second opening portion.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: August 2, 2016
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoshi Murakami, Masahiko Hayakawa, Shunpei Yamazaki
  • Patent number: 9401655
    Abstract: An inverter circuit including a DC capacitor is connected in series to an AC power supply, and at the stage subsequent to the inverter circuit, a smoothing capacitor is connected via a converter circuit. A short-circuit period T for short-circuiting the AC terminals of the converter circuit is provided in one cycle, whereby the converter circuit is controlled, and PWM control is performed for the inverter circuit so as to improve an AC power supply power factor. When current control by the inverter circuit cannot be performed, the PWM control is switched to PWM control for the converter circuit, to perform current control.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: July 26, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ryota Kondo, Satoshi Murakami, Masaki Yamada
  • Publication number: 20160204707
    Abstract: A power conversion device that distributes input power to multiple outputs in accordance with power requirement of a load, using a plurality of magnetically coupled windings. In the case of supplying power from an AC power supply, at least one of an AC/DC converter and first to fourth switching circuits controls voltage on an output side of the AC/DC converter, based on a deviation between a detected value and a target value of the voltage. In the case of supplying power from a first DC voltage source or a second DC voltage source, the second switching circuit or the fourth switching circuit provided between the first DC voltage source or the second DC voltage source and the transformer supplies power based on an arbitrary time ratio.
    Type: Application
    Filed: October 20, 2014
    Publication date: July 14, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takaaki TAKAHARA, Satoshi MURAKAMI, Ryota KONDO, Masaki YAMADA
  • Publication number: 20160197562
    Abstract: An electric power conversion device which performs conversion to desired voltage using charge and discharge of a DC capacitor includes: a reactor connected to a rectification circuit; a leg part in which diodes and first and second switching elements are connected in series between positive and negative terminals of a smoothing capacitor, and to which the reactor is connected; and the DC capacitor. A control circuit performs high-frequency PWM control for the first and second switching elements using the same drive cycle, with their reference phases shifted from each other by a half cycle, and controls a sum and a ratio of ON periods of the first and second switching elements in one cycle, thereby allowing both high-power-factor control for input AC current and voltage control for the DC capacitor.
    Type: Application
    Filed: June 3, 2014
    Publication date: July 7, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Ryota KONDO, Takaaki TAKAHARA, Satoshi MURAKAMI, Masaki YAMADA, Naohisa UEHARA, Yuuya TANAKA, Hidehiko KINOSHITA
  • Patent number: 9371519
    Abstract: The present invention provides a novel endo-?-N-acetylglucosaminidase (Endo-Om) using a transformant produced by cloning an endo-?-N-acetylglucosaminidase (Endo-Om) gene originated from a methylotrophic yeast Ogataea minuta IFO10746 strain. The Endo-Om according to the present invention has a specific activity 13-fold higher than that of known Endo-M and a Vmax value 55-fold higher than that of the known Endo-M, and is useful for the analysis of the structures of sugar chains, including complex type sugar chains, in glycoproteins and the modification of the sugar chains.
    Type: Grant
    Filed: October 3, 2012
    Date of Patent: June 21, 2016
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Yasunori Chiba, Satoshi Murakami, Hisashi Narimatsu
  • Patent number: 9368561
    Abstract: In the case where a material containing an alkaline-earth metal in a cathode, is used, there is a fear of the diffusion of an impurity ion (such as alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT. Therefore, as the insulating film provided between TFT and EL element, a film containing a material for not only blocking the diffusion of an impurity ion such as an alkaline-earth metal ion but also aggressively absorbing an impurity ion such as an alkaline-earth metal ion is used.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: June 14, 2016
    Assignee: Semiconductor Enery Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Mitsuhiro Ichijo, Taketomi Asami
  • Patent number: 9366930
    Abstract: A structure for preventing deteriorations of a light-emitting device and retaining sufficient capacitor elements (condenser) required by each pixel is provided. A first passivation film, a second metal layer, a flattening film, a barrier film, and a third metal layer are stacked in this order over a transistor. A side face of a first opening provided with the flattening film is covered by the barrier film, a second opening is formed inside the first opening, and a third metal layer is connected to a semiconductor via the first opening and the second opening. A capacitor element that is formed of a lamination of a semiconductor of a transistor, a gate insulating film, a gate electrode, the first passivation film, and the second metal layer is provided.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: June 14, 2016
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Shunpei Yamazaki, Toru Takayama, Satoshi Murakami, Hajime Kimura
  • Publication number: 20160163470
    Abstract: A power storage device which can have an improved performance such as higher discharge capacity and in which deterioration due to peeling of an active material layer or the like is difficult to occur, and a method for manufacturing the power storage device are provided. The power storage device includes a current collector, a mixed layer formed over the current collector, and a crystalline silicon layer which is formed over the mixed layer and functions as an active material layer. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region including a plurality of protrusions projecting over the crystalline silicon region. The whisker-like crystalline silicon region includes a protrusion having a bending or branching portion.
    Type: Application
    Filed: February 1, 2016
    Publication date: June 9, 2016
    Inventors: Satoshi MURAKAMI, Kazutaka KURIKI, Mikio YUKAWA
  • Publication number: 20160141573
    Abstract: Battery pack includes the following elements: large number of battery cells; lower holding member provided to hold the lower parts of large number of battery cells aligned by battery holding parts, and having lower openings for exposing the negative electrode terminal side of the battery cells; a positive electrode current collecting plate and a negative electrode current collecting plate connected to the corresponding terminals of the battery cells; and holder formed of upper holding member and lower holding member. In holder, upper gas channel for guiding the gas jetted from battery cells to the front side is formed. Inside holder, lower gas channel is formed on the periphery of the large number of battery cells. In holder, exhaust port is formed. In upper holding member, a communication hole for allowing communication between upper gas channel and lower gas channel is formed.
    Type: Application
    Filed: March 10, 2014
    Publication date: May 19, 2016
    Inventors: Tomoaki AOKI, Satoshi MURAKAMI, Keisuke SHIMIZU
  • Publication number: 20160086982
    Abstract: Disclosed is a display device and an electronic apparatus incorporating the display device. The display device includes a transistor and a planarization film over the transistor. The planarization film has an opening where an edge portion is rounded. The display device further includes a first electrode over the planarization film and an organic resin film over the first electrode. The organic resin film also has an opening where an edge portion is rounded. The organic resin film is located in the opening of the planarization film. The first electrode and the transistor are electrically connected to each other through a conductive film. The first electrode is in contact with a top surface of the conductive film. Over the first electrode, a light-emitting member and a second electrode are provided.
    Type: Application
    Filed: October 15, 2015
    Publication date: March 24, 2016
    Inventors: Shunpei YAMAZAKI, Satoshi MURAKAMI, Mitsuaki OSAME
  • Patent number: 9281495
    Abstract: It is an object of the present invention to provide a technology for manufacturing a highly reliable display device at a low cost with high yield. In the present invention, a spacer is formed over a pixel electrode, thereby protecting the pixel electrode layer from a mask in formation of an electroluminescent layer. In addition, since a layer that includes an organic material that has water permeability is sealed in a display device with a sealing material and the sealing material and the layer that includes the organic material are not in contact, deterioration of a light-emitting element due to a contaminant such as water can be prevented. The sealing material is formed in a portion of a driver circuit region in the display device, and thus, the narrower frame margin of the display device can also be accomplished.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: March 8, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Hisashi Ohtani, Shunpei Yamazaki
  • Patent number: 9281134
    Abstract: A power storage device which can have an improved performance such as higher discharge capacity and in which deterioration due to peeling of an active material layer or the like is difficult to occur, and a method for manufacturing the power storage device are provided. The power storage device includes a current collector, a mixed layer formed over the current collector, and a crystalline silicon layer which is formed over the mixed layer and functions as an active material layer. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region including a plurality of protrusions projecting over the crystalline silicon region. The whisker-like crystalline silicon region includes a protrusion having a bending or branching portion.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: March 8, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Kazutaka Kuriki, Mikio Yukawa
  • Patent number: 9276496
    Abstract: An inverter circuit is connected in series to an AC power supply, and at the subsequent stage, a smoothing capacitor is connected via a converter circuit including semiconductor switching devices. A control circuit controls the converter circuit by providing a short-circuit period for bypassing the smoothing capacitor in each cycle, and controls the inverter circuit to improve the power factor of the AC power supply by using a current instruction such that the voltage of the smoothing capacitor becomes a target voltage. When the voltage of a DC voltage source of the inverter circuit has exceeded a predetermined upper limit, the control circuit increases the current instruction to control the inverter circuit, thereby increasing the discharge amount of the DC voltage source. Thus, even if the voltage variation of the DC voltage source of the inverter circuit increases, it is possible to stably continue the control.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: March 1, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Satoshi Murakami, Masaki Yamada, Takashi Kaneyama, Kazutoshi Awane
  • Patent number: 9235095
    Abstract: In an active matrix type liquid crystal display device, in which functional circuits such as a shift register circuit and a buffer circuit are incorporated on the same substrate, an optimal TFT structure is provided along with the aperture ratio of a pixel matrix circuit is increased. There is a structure in which an n-channel TFT, with a third impurity region which overlaps a gate electrode, is formed in a buffer circuit, etc., and an n-channel TFT, in which a fourth impurity region which does not overlap the gate electrode, is formed in a pixel matrix circuit. A storage capacitor formed in the pixel matrix circuit is formed by a light shielding film, a dielectric film formed on the light shielding film, and a pixel electrode. Al is especially used in the light shielding film, and the dielectric film is formed anodic oxidation process, using an Al oxide film.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: January 12, 2016
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Jun Koyama, Yukio Tanaka, Hidehito Kitakado
  • Publication number: 20150381063
    Abstract: A DC-DC converter wherein a series reactor and primary-side terminals of a transformer are connected between output terminals of a full-bridge inverter in which each of an upper arm and a lower arm includes a switching element and a freewheel diode, and a rectifier circuit and a filter circuit are connected to secondary-side terminals of the transformer. The DC-DC converter includes a circulation current generation mode in which a circulation current flowing between the transformer and the switching element is generated in a power non-transmission period, and a circulation current interruption mode in which the circulation current is interrupted.
    Type: Application
    Filed: March 28, 2013
    Publication date: December 31, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takaaki TAKAHARA, Satoshi MURAKAMI, Ryota KONDO, Masaki YAMADA
  • Publication number: 20150357937
    Abstract: A three-phase power conversion device includes: single-phase inverters having AC output ends connected in series to the respective phases of the three-phase AC lines; a control device for performing PWM control for each single-phase inverter based on a voltage command V*; and an AC voltage detection circuit for detecting a phase and a voltage amplitude of three-phase AC voltage. The control device adds a zero-phase component Vo common to the three phases to a basic command Vx* for each phase to generate a voltage command V*. The zero-phase component Vo is generated by applying an amplitude a calculated based on the phase and the voltage amplitude to reference zero-phase voltage Voo that has been set, thereby reducing a peak of the voltage command V* for each single-phase inverter.
    Type: Application
    Filed: November 25, 2013
    Publication date: December 10, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takaaki TAKAHARA, Ryota KONDO, Satoshi MURAKAMI, Masaki YAMADA
  • Patent number: D745600
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: December 15, 2015
    Assignee: KONICA MINOLTA, INC.
    Inventors: Masakazu Nagano, Yu Iritani, Satoshi Murakami, Thomas Keen, Christoph Gredler, Florent Cuchet, Peter Li, Tom Judd, Eriko Matsumura
  • Patent number: D745601
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: December 15, 2015
    Assignee: KONICA MINOLTA, INC.
    Inventors: Masakazu Nagano, Yu Iritani, Satoshi Murakami, Thomas Keen, Christoph Gredler, Florent Cuchet, Peter Li, Tom Judd, Eriko Matsumura
  • Patent number: D750701
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: March 1, 2016
    Assignee: KONICA MINOLTA, INC.
    Inventors: Masakazu Nagano, Yu Iritani, Satoshi Murakami, Thomas Keen, Christoph Gredler, Florent Cuchet, Peter Li, Tom Judd, Eriko Matsumura