Abstract: A connector according to an aspect of the invention is a connector provided with a rear connector that includes a rear housing, and a front connector that includes a front housing and that is assembled to the rear connector; the rear housing contains a terminal of a cable end, and the front housing contains a mating terminal to be connected to the terminal; and the rear housing is provided with a checking window through which the terminal is exposed to outside and a voltage of the terminal can be checked, and a waterproof lid which closes the checking window in a sealed state.

Abstract: A disclosed semiconductor integrated circuit device includes a semiconductor substrate; and multiple semiconductor elements disposed on the semiconductor substrate. The semiconductor elements include an n-channel MOS transistor and a p-channel MOS transistor. The n-channel MOS transistor is covered by a tensile stress film, and the p-channel MOS transistor is covered by a compressive stress film. A dummy region, the entire surface of which is covered by a combination of the tensile stress film and the compressive stress film, is disposed on the surface of the semiconductor substrate.

Abstract: A method of manufacturing a semiconductor integrated circuit device which includes a semiconductor substrate; and multiple semiconductor elements disposed on the semiconductor substrate. The semiconductor elements include an n-channel MOS transistor and a p-channel MOS transistor. The n-channel MOS transistor is covered by a tensile stress film, and the p-channel MOS transistor is covered by a compressive stress film. A dummy region, the entire surface of which is covered by a combination of the tensile stress film and the compressive stress film, is disposed on the surface of the semiconductor substrate.

Abstract: A method of manufacturing a semiconductor integrated circuit device which includes a semiconductor substrate; and multiple semiconductor elements disposed on the semiconductor substrate. The semiconductor elements include an n-channel MOS transistor and a p-channel MOS transistor. The n-channel MOS transistor is covered by a tensile stress film, and the p-channel MOS transistor is covered by a compressive stress film. A dummy region, the entire surface of which is covered by a combination of the tensile stress film and the compressive stress film, is disposed on the surface of the semiconductor substrate.

Abstract: An image display apparatus includes an image display unit that displays an image for a stereoscopic image, a light-source control unit that controls a light source of the image display unit, a content discriminating unit that discriminates whether the image displayed on the image display unit is a limited image requiring viewing limitation or an unlimited image not requiring the viewing limitation, and a shutter control unit that controls shutter of shutter devices. The light-source control unit controls the light source to reduce light emission in a second period compared with light emission in a first period. The shutter control unit controls, during the display of the limited image, the shutter device set in a viewing limitation mode for limiting viewing of the limited image, to close the shutter in the first period and open the shutter in the second period.

Abstract: The present invention provides a catalyst precursor substance containing copper, zinc, and aluminum and exhibiting an X-ray diffraction pattern having a broad peak at a specific interplanar spacing d (?). The present invention also provides a method for producing the catalyst precursor substance by mixing a solution containing a copper salt, a zinc salt, and an aluminum salt with a solution containing an alkali metal hydroxide or an alkaline earth metal hydroxide, thereby forming a precipitate. In the present invention, a catalyst is prepared through calcining of the catalyst precursor; the catalyst is employed for water gas shift reaction; and carbon monoxide conversion is carried out by use of the catalyst.

Abstract: A method of manufacturing a semiconductor device whereby, even in cases where ions are implanted into a shallow region of a semiconductor substrate when a deep well is formed, the influence of the ions on a MOSFET can be removed, thereby eliminating the need for increasing the chip area. A photoresist with a thickness matching the wavelength of exposure light is formed over the semiconductor substrate and then is exposed to the exposure light to form a photoresist pattern with an opening corresponding to a region for forming a first well. Subsequently, using the photoresist pattern as a mask, ions are implanted to form the first well, and after the photoresist pattern is removed, an epitaxial layer is grown over the semiconductor substrate. Consequently, the deep well is virtually located deeper in level than at the time of the ion implantation by an amount corresponding to the thickness of the epitaxial layer.

Abstract: A semiconductor device has a first and a second active regions of a first conductivity type disposed on a semiconductor substrate, a third and a fourth active regions of a second conductivity type disposed on the semiconductor substrate, the second and the fourth active regions having sizes larger than those of the first and the third active regions respectively, a first electroconductive pattern disposed adjacent to the first active region and having a first width, a second electroconductive pattern disposed adjacent to the second active region and having a second width larger than the first width, a third electroconductive pattern disposed adjacent to the third active region and having a third width; and a fourth electroconductive pattern disposed adjacent to the fourth active region and having a fourth width smaller than the third width.

Abstract: The invention provides a catalyst for carbon monoxide conversion, comprising from 10 to 90% by mass of a copper oxide ingredient, from 5 to 50% by mass of a zinc oxide ingredient and from 10 to 50% by mass of an aluminum oxide ingredient, and having a specific surface area of from 100 to 300 m2/g, a carbon monoxide adsorption of from 20 to 80 ?mol/g, and a copper oxide crystallite diameter of at most 200 angstroms, as a catalyst suitable for carbon monoxide conversion for fully reducing carbon monoxide in the hydrogen gas obtained through reforming of a starting hydrocarbon material, for the purpose of enabling stable long-term operation of a fuel cell which uses hydrogen gas as a fuel and which is frequently and repeatedly started and stopped.

Abstract: The present invention provides a catalyst precursor substance containing copper, zinc, and aluminum and exhibiting an X-ray diffraction pattern having a broad peak at a specific interplanar spacing d (?). The present invention also provides a method for producing the catalyst precursor substance by mixing a solution containing a copper salt, a zinc salt, and an aluminum salt with a solution containing an alkali metal hydroxide or an alkaline earth metal hydroxide, thereby forming a precipitate. In the present invention, a catalyst is prepared through calcining of the catalyst precursor; the catalyst is employed for water gas shift reaction; and carbon monoxide conversion is carried out by use of the catalyst.

Abstract: The invention provides a catalyst for carbon monoxide conversion, comprising from 10 to 90% by mass of a copper oxide ingredient, from 5 to 50% by mass of a zinc oxide ingredient and from 10 to 50% by mass of an aluminum oxide ingredient, and having a specific surface area of from 100 to 300 m2/g, a carbon monoxide adsorption of from 20 to 80 ?mol/g, and a copper oxide crystallite diameter of at most 200 angstroms, as a catalyst suitable for carbon monoxide conversion for fully reducing carbon monoxide in the hydrogen gas obtained through reforming of a starting hydrocarbon material, for the purpose of enabling stable long-term operation of a fuel cell which uses hydrogen gas as a fuel and which is frequently and repeatedly started and stopped.

Abstract: A disclosed semiconductor integrated circuit device includes a semiconductor substrate; and multiple semiconductor elements disposed on the semiconductor substrate. The semiconductor elements include an n-channel MOS transistor and a p-channel MOS transistor. The n-channel MOS transistor is covered by a tensile stress film, and the p-channel MOS transistor is covered by a compressive stress film. A dummy region, the entire surface of which is covered by a combination of the tensile stress film and the compressive stress film, is disposed on the surface of the semiconductor substrate.

Abstract: A semiconductor device has a first and a second active regions of a first conductivity type disposed on a semiconductor substrate, a third and a fourth active regions of a second conductivity type disposed on the semiconductor substrate, the second and the fourth active regions having sizes larger than those of the first and the third active regions respectively, a first electroconductive pattern disposed adjacent to the first active region and having a first width, a second electroconductive pattern disposed adjacent to the second active region and having a second width larger than the first width, a third electroconductive pattern disposed adjacent to the third active region and having a third width; and a fourth electroconductive pattern disposed adjacent to the fourth active region and having a fourth width smaller than the third width.

Abstract: The present invention provides a semiconductor device fabrication method including the steps of: forming first gate insulating films in first to third active regions of a silicon substrate; wet-etching the first gate insulating film of the second active region through a first resist opening portion of a first resist pattern; forming a second gate insulating film in the second active region; forming on the silicon substrate a second resist pattern having a second resist portion larger than the first resist opening portion; wet-etching the first gate insulating film of the third active region through a second resist opening portion of the second resist pattern; and forming a third gate insulating film in the third active region.

Abstract: A method of manufacturing a semiconductor device whereby, even in cases where ions are implanted into a shallow region of a semiconductor substrate when a deep well is formed, the influence of the ions on a MOSFET can be removed, thereby eliminating the need for increasing the chip area. A photoresist with a thickness matching the wavelength of exposure light is formed over the semiconductor substrate and then is exposed to the exposure light to form a photoresist pattern with an opening corresponding to a region for forming a first well. Subsequently, using the photoresist pattern as a mask, ions are implanted to form the first well, and after the photoresist pattern is removed, an epitaxial layer is grown over the semiconductor substrate. Consequently, the deep well is virtually located deeper in level than at the time of the ion implantation by an amount corresponding to the thickness of the epitaxial layer.

Abstract: An ignition unit promotes the efficiency of assembly because connections on the high voltage output side and the ground side are completed by a single operation, when an ignition electrode part and a main unit are connected together directly. A guide rail of the main unit is insertion-engaged into a slit between clamp pieces of a bracket so that the main unit is mounted onto the bracket. With the insertion engagement, a high voltage output terminal receives therein a high voltage input terminal of a spark plug supported by the bracket, a plate terminal which is a part of the bracket is driven into a ground-side connection terminal, and a convex portion of a projected piece is engaged into an engagement hole, for positioning and slipping-off prevention.

Abstract: The present invention provides a semiconductor device fabrication method including the steps of: forming first gate insulating films in first to third active regions of a silicon substrate; wet-etching the first gate insulating film of the second active region through a first resist opening portion of a first resist pattern; forming a second gate insulating film in the second active region; forming on the silicon substrate a second resist pattern having a second resist portion larger than the first resist opening portion; wet-etching the first gate insulating film of the third active region through a second resist opening portion of the second resist pattern; and forming a third gate insulating film in the third active region.

Abstract: A method for manufacturing a semiconductor device includes: forming a first photoresist pattern on a second hard mask by use of ArF; forming first and second openings in the second hard mask by use of the first photoresist pattern as an etching mask; forming third and fourth openings in a first hard mask under the first and second openings; forming a partial trench (first trench) and a trench for a full trench (second trench) in an SOI substrate (semiconductor substrate) under the first and second openings; and forming the trench for a full trench into a full trench by etching the trench for a full trench through the fourth opening exposed through a third window of a second photoresist pattern.

Abstract: First and second gate electrodes are formed on first and second regions of a semiconductor substrate. Second conductivity type impurities are implanted into the second region to form first impurity diffusion regions. Spacer films are formed on the side surfaces of the first and second gate electrodes. Second conductivity type impurities are implanted into the first and second regions to form second impurity diffusion regions. After the spacer films are removed, second conductivity type impurities are implanted into the first region to form third impurity diffusion regions. The third activation process is performed so that the gradient of impurity concentration distribution around the third impurity diffusion region becomes steeper than the gradient of impurity concentration distribution around the first impurity diffusion region.

Abstract: A method for manufacturing a semiconductor device includes: forming a first photoresist pattern on a second hard mask by use of ArF; forming first and second openings in the second hard mask by use of the first photoresist pattern as an etching mask; forming third and fourth openings in a first hard mask under the first and second openings; forming a partial trench (first trench) and a trench for a full trench (second trench) in an SOI substrate (semiconductor substrate) under the first and second openings; and forming the trench for a full trench into a full trench by etching the trench for a full trench through the fourth opening exposed through a third window of a second photoresist pattern.