Patents by Inventor Satoshi Ogino

Satoshi Ogino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8338247
    Abstract: To improve the performance of semiconductor devices. Over an n+-type semiconductor region for source/drain of an n-channel type MISFET and a first gate electrode, and over a p+-type semiconductor region for source/drain of a p-channel type MISFET and a second gate electrode, which are formed over a semiconductor substrate, a metal silicide layer including nickel platinum silicide is formed by a salicide process. After that, a tensile stress film is formed over the whole face of the semiconductor substrate, and then the tensile stress film over the p-channel type MISFET is removed by dry-etching, and, after a compression stress film is formed over the whole face of the semiconductor substrate, the compression stress film over the n-channel type MISFET is removed by dry-etching. The Pt concentration in the metal silicide layer is highest at the surface, and becomes lower as the depth from the surface increases.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: December 25, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Tadashi Yamaguchi, Toshiaki Tsutsumi, Satoshi Ogino, Kazumasa Yonekura, Kenji Kawai, Yoshihiro Miyagawa, Tomonori Okudaira, Keiichiro Kashihara, Kotaro Kihara
  • Patent number: 7928014
    Abstract: A method for manufacturing a semiconductor device includes: mounting a wafer having an exposed silicon nitride film, on an electrode received in a plasma chamber; dry-cleaning the chamber to remove reaction products accumulated on the wall and ceiling of the chamber, anisotropic-etching the silicon nitride film and an underlying silicon film for patterning; and removing the wafer from the chamber. The method repeats the treatment for a number of semiconductor wafers.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: April 19, 2011
    Assignee: Elpida Memory, Inc.
    Inventor: Satoshi Ogino
  • Publication number: 20100230761
    Abstract: To improve the performance of semiconductor devices. Over an n+-type semiconductor region for source/drain of an n-channel type MISFET and a first gate electrode, and over a p+-type semiconductor region for source/drain of a p-channel type MISFET and a second gate electrode, which are formed over a semiconductor substrate, a metal silicide layer including nickel platinum silicide is formed by a salicide process. After that, a tensile stress film is formed over the whole face of the semiconductor substrate, and then the tensile stress film over the p-channel type MISFET is removed by dry-etching, and, after a compression stress film is formed over the whole face of the semiconductor substrate, the compression stress film over the n-channel type MISFET is removed by dry-etching. The Pt concentration in the metal silicide layer is highest at the surface, and becomes lower as the depth from the surface increases.
    Type: Application
    Filed: March 9, 2010
    Publication date: September 16, 2010
    Inventors: Tadashi Yamaguchi, Toshiaki Tsutsumi, Satoshi Ogino, Kazumasa Yonekura, Kenji Kawai, Yoshihiro Miyagawa, Tomonori Okudaira, Keiichiro Kashihara, Kotaro Kihara
  • Patent number: 7615281
    Abstract: A radio wave absorbing coating composition that exhibits an excellent absorption performance of radio waves in 40 MHz to 3 GHz frequency band is provided. The radio wave absorbing coating composition contains metal powder that is made up of a martensitic Fe—Cr—Ni alloy powder and/or a martensitic Fe—Ni alloy powder, carbon powder, resin, and solvent.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: November 10, 2009
    Assignees: Fujikura Kasei Co., Ltd.
    Inventors: Toshifumi Yamamoto, Hiroaki Watanabe, Satoshi Ogino, Takashi Takagai
  • Publication number: 20070293051
    Abstract: A method for manufacturing a semiconductor device includes: mounting a wafer having an exposed silicon nitride film, on an electrode received in a plasma chamber; dry-cleaning the chamber to remove reaction products accumulated on the wall and ceiling of the chamber, anisotropic-etching the silicon nitride film and an underlying silicon film for patterning; and removing the wafer from the chamber. The method repeats the treatment for a number of semiconductor wafers.
    Type: Application
    Filed: June 19, 2007
    Publication date: December 20, 2007
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Satoshi Ogino
  • Publication number: 20070003757
    Abstract: A radio wave absorbing coating composition that exhibits an excellent absorption performance of radio waves in 40 MHz to 3 GHz frequency band is provided. The radio wave absorbing coating composition contains metal powder that is made up of a martensitic Fe—Cr—Ni alloy powder and/or a martensitic Fe—Ni alloy powder, carbon powder, resin, and solvent.
    Type: Application
    Filed: June 23, 2006
    Publication date: January 4, 2007
    Applicants: FUJIKURA KASEI CO., LTD., MICROWAVE ABSORBERS INC.
    Inventors: Toshifumi Yamamoto, Hiroaki Watanabe, Satoshi Ogino, Takashi Takagai
  • Patent number: 6656849
    Abstract: A plasma reactor is provided for achieving extension of etching parameters to reduce charge-up shape anomaly and to improve selectivity, uniformity and workability in a dry etching process. An RF power fluctuates in cycles, each one of the cycles including first and second subcycles (25), (26) with different frequencies. The RF power in the first subcycles (25) is higher in frequency than that in the second subcycles (26). A charge accumulated during the first subcycles (25) in which the RF power of high frequency is applied can be relieved during the second subcycles (26) in which the RF power of low frequency is applied. At the same time, deterioration in an etching rate occurring with the application of only the RF power of low frequency can be relieved by applying the RF power of high frequency during the first subcycles (25).
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: December 2, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Satoshi Ogino, Takahiro Maruyama
  • Publication number: 20030000646
    Abstract: A plasma reactor is provided for achieving extension of etching parameters to reduce charge-up shape anomaly and to improve selectivity, uniformity and workability in a dry etching process. An RF power fluctuates in cycles, each one of the cycles including first and second subcycles (25), (26) with different frequencies. The RF power in the first subcycles (25) is higher in frequency than that in the second subcycles (26). A charge accumulated during the first subcycles (25) in which the RF power of high frequency is applied can be relieved during the second subcycles (26) in which the RF power of low frequency is applied. At the same time, deterioration in an etching rate occurring with the application of only the RF power of low frequency can be relieved by applying the RF power of high frequency during the first subcycles (25).
    Type: Application
    Filed: August 28, 2002
    Publication date: January 2, 2003
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Satoshi Ogino, Takahiro Maruyama
  • Patent number: 6471821
    Abstract: A plasma reactor is provided for achieving extension of etching parameters to reduce charge-up shape anomaly and to improve selectivity, uniformity and workability in a dry etching process. An RF power fluctuates in cycles, each one of the cycles including first and second subcycles (25), (26) with different frequencies. The RF power in the first subcycles (25) is higher in frequency than that in the second subcycles (26). A charge accumulated during the first subcycles (25) in which the RF power of high frequency is applied can be relieved during the second subcycles (26) in which the RF power of low frequency is applied. At the same time, deterioration in an etching rate occurring with the application of only the RF power of low frequency can be relieved by applying the RF power of high frequency during the first subcycles (25).
    Type: Grant
    Filed: May 1, 1997
    Date of Patent: October 29, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Satoshi Ogino, Takahiro Maruyama
  • Publication number: 20020066537
    Abstract: A plasma reactor is provided for achieving extension of etching parameters to reduce charge-up shape anomaly and to improve selectivity, uniformity and workability in a dry etching process. An RF power fluctuates in cycles, each one of the cycles including first and second subcycles (25), (26) with different frequencies. The RF power in the first subcycles (25) is higher in frequency than that in the second subcycles (26). A charge accumulated during the first subcycles (25) in which the RF power of high frequency is applied can be relieved during the second subcycles (26) in which the RF power of low frequency is applied. At the same time, deterioration in an etching rate occurring with the application of only the RF power of low frequency can be relieved by applying the RF power of high frequency during the first subcycles (25).
    Type: Application
    Filed: May 1, 1997
    Publication date: June 6, 2002
    Inventors: SATOSHI OGINO, TAKAHIRO MARUYAMA
  • Patent number: 6232209
    Abstract: A gate electrode includes a polycrystalline silicon layer, a barrier layer and a metal layer. The metal layer and barrier layer includes for example W and RuO2 layers, respectively. In forming the gate electrode, the metal layer and barrier layer are etched using at least one of the barrier layer and polycrystalline silicon layer as an etching stopper.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: May 15, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuo Fujiwara, Takahiro Maruyama, Shigenori Sakamori, Akemi Teratani, Satoshi Ogino, Kazuyuki Ohmi, Yuzo Irie
  • Patent number: 6156152
    Abstract: Provided is a plasma processing apparatus capable of extending an etching parameter to reduce charge-up shape anomalies in dry etching and to enhance etching performance such as selectivity, uniformity, processability or the like. A microwave is controlled to be modulated in frequency and is introduced into a chamber. An ECR face is moved between two positions according to the frequency of the microwave.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: December 5, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Satoshi Ogino, Kazumasa Yonekura, Hajime Kimura, Shigenori Sakamori