Patents by Inventor Satoshi Ohkubo

Satoshi Ohkubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030022523
    Abstract: A manufacture method for a semiconductor device includes the steps of: (a) transporting a silicon wafer into a reaction chamber having first and second gas introducing inlet ports; (b) introducing an oxidizing atmosphere via the first gas introducing inlet port and raising the temperature of the silicon wafer to an oxidation temperature; (c) introducing a wet oxidizing atmosphere to form a thermal oxide film on the surface of the silicon wafer; (d) purging gas in the reaction chamber by using inert gas to lower a residual water concentration to about 1000 ppm or lower; and (e) introducing an NO or N2O containing atmosphere into the reaction chamber via the second gas introducing inlet port while the silicon wafer is maintained above 700° C. and above the oxidation temperature, to introduce nitrogen into the thermal oxide film and form an oxynitride film. A thin oxynitride film can be manufactured with good mass productivity.
    Type: Application
    Filed: September 6, 2002
    Publication date: January 30, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Kiyoshi Irino, Ken-ichi Hikazutani, Tatsuya Kawamura, Taro Sugizaki, Satoshi Ohkubo, Toshiro Nakanishi, Kanetake Takasaki
  • Patent number: 6468926
    Abstract: A manufacture method for a semiconductor device includes the steps of: (a) transporting a silicon wafer into a reaction chamber having first and second gas introducing inlet ports; (b) introducing an oxidizing atmosphere via the first gas introducing inlet port and raising the temperature of the silicon wafer to an oxidation temperature; (c) introducing a wet oxidizing atmosphere to form a thermal oxide film on the surface of the silicon wafer; (d) purging gas in the reaction chamber by using inert gas to lower a residual water concentration to about 1000 ppm or lower; and (e) introducing an NO or N2O containing atmosphere into the reaction chamber via the second gas introducing inlet port while the silicon wafer is maintained above 700° C. and above the oxidation temperature, to introduce nitrogen into the thermal oxide film and form an oxynitride film. A thin oxynitride film can be manufactured with good mass productivity.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: October 22, 2002
    Assignee: Fujitsu Limited
    Inventors: Kiyoshi Irino, Ken-ichi Hikazutani, Tatsuya Kawamura, Taro Sugizaki, Satoshi Ohkubo, Toshiro Nakanishi, Kanetake Takasaki
  • Patent number: 6188090
    Abstract: A method for fabricating a compound semiconductor device includes the steps of depositing a first group III-V compound semiconductor layer on a surface of a Si substrate while holding a temperature of the Si substrate at a first temperature, depositing a second group III-V compound semiconductor layer on the first group III-V compound semiconductor layer while holding the temperature of the substrate at a second, higher temperature, and depositing a third group III-V compound semiconductor layer on the second group III-V compound semiconductor layer while holding the temperature of the substrate at a third temperature higher than said second temperature, wherein the second group III-V compound semiconductor layer contains Al.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: February 13, 2001
    Assignee: Fujitsu Limited
    Inventors: Shinji Miyagaki, Takashi Eshita, Satoshi Ohkubo, Kazuaki Takai
  • Patent number: 5834362
    Abstract: A method for fabricating a compound semiconductor device includes the steps of depositing a first group III-V compound semiconductor layer on a surface of a Si substrate while holding a temperature of the Si substrate at a first temperature, depositing a second group III-V compound semiconductor layer on the first group III-V compound semiconductor layer while holding the temperature of the substrate at a second, higher temperature, and depositing a third group III-V compound semiconductor layer on the second group III-V compound semiconductor layer while holding the temperature of the substrate at a third temperature higher than said second temperature, wherein the second group III-V compound semiconductor layer contains Al.
    Type: Grant
    Filed: March 21, 1996
    Date of Patent: November 10, 1998
    Assignee: Fujitsu Limited
    Inventors: Shinji Miyagaki, Takashi Eshita, Satoshi Ohkubo, Kazuaki Takai
  • Patent number: 5492860
    Abstract: A method of growing a layer of a III-V compound semiconductor on a silicon substrate comprises an oxide layer removing step of removing an oxide layer on a surface of the silicon substrate at a first temperature, a low-temperature grown layer forming step of forming a low-temperature grown layer of the III-V compound semiconductor on the silicon substrate while introducing a source gas for Group III and a source gas for Group V at a second temperature lower than the first temperature, and a single crystal layer growing step of growing a single crystal layer of the Group III-V compound semiconductor on the low-temperature grown layer while introducing the source gas for Group III and the source gas for Group V at a third temperature higher than the second temperature and lower than the first temperature.
    Type: Grant
    Filed: April 16, 1993
    Date of Patent: February 20, 1996
    Assignee: Fujitsu Limited
    Inventors: Satoshi Ohkubo, Shinji Miyagaki