Patents by Inventor Satoshi Ota

Satoshi Ota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250119267
    Abstract: Improved transmission efficiency with minimized latency is disclosed. In one example, a communication apparatus is configured to count an interval allocated in a TDD (Time Division Duplex) mode as one TDD time slot, with a plurality of the TDD time slots counted as one period. It periodically transmits, to a communication partner apparatus, multiple application packets corresponding to multiple serial signals generated by multiple applications. A specific TDD time slot is used for transmitting a portion of the application packets corresponding to at least two of the multiple applications on a prioritized basis.
    Type: Application
    Filed: September 16, 2024
    Publication date: April 10, 2025
    Inventors: Toshihisa Hyakudai, Satoshi Ota, Junya Yamada
  • Publication number: 20250059680
    Abstract: There is provided a neutron-generating target, including a beryllium layer composed of a plurality of beryllium crystal grains having a columnar structure that has grown in a thickness direction, wherein the beryllium layer has gaps between the plurality of beryllium crystal grains.
    Type: Application
    Filed: June 3, 2024
    Publication date: February 20, 2025
    Applicant: NGK INSULATORS, LTD.
    Inventors: Satoshi OTA, Masato SAKAKIBARA
  • Publication number: 20250023663
    Abstract: Efficient high speed transmission of different types of packets having different structures conforming to CSI-2 standards of MIPI is disclosed. In one example, a communication apparatus includes a packet generation unit configured to encapsulate a packet conforming to camera serial interface 2 (CSI-2) standards defined by camera service extensions (CSE) standards of Mobile Industry Processor Interface (MIPI) Alliance without distinguishing a type and a structure of the packet to generate an application packet, and a communication unit configured to transmit the application packet to a communication partner apparatus.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 16, 2025
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota, Tetsuya Hiraoka
  • Patent number: 12146532
    Abstract: A clutch device includes a pressure plate movable toward or away from a clutch center and rotatable relative to the clutch center to press input-side rotating plates and output-side rotating plates. The clutch center includes center-side cam portions each including a center-side assist cam surface. At least one of the center-side cam portions includes at least one of a first center-side recess recessed in a first direction from a surface of center-side cam portion at a side of a second direction or a second center-side recess recessed in the second direction from a surface of the center-side cam portion at a side of the first direction.
    Type: Grant
    Filed: July 21, 2023
    Date of Patent: November 19, 2024
    Assignee: KABUSHIKI KAISHA F.C.C.
    Inventors: Yuki Kobayashi, Takayuki Suzuki, Takayoshi Mimuro, Jun Komukai, Yasunori Higashi, Makoto Kambara, Satoshi Ota, Yukinori Kurita
  • Publication number: 20240370400
    Abstract: Communication devices and systems are disclosed. In one example, a communication device includes a LINK that performs protocol conversion of a signal from a Master and outputs the converted signal to a Slave SerDes, and of a signal from the Slave SerDes and outputs the converted signal to the Master. The LINK alternatively selects a first mode and a second mode. In the first mode, the LINK converts a 1-byte signal transmitted from the Master into a signal of a first communication standard in units of the 1-byte signal and transmits the converted signal to the Slave SerDes, then receives a signal of the first communication standard including an ACK signal representing an acknowledgement or a NACK signal representing a negative acknowledgement, and converts the received signal into a signal of a second communication standard and transmits the converted signal to the Master.
    Type: Application
    Filed: May 14, 2024
    Publication date: November 7, 2024
    Inventors: Junya Yamada, Satoshi Ota, Toshihisa Hyakudai
  • Patent number: 12130768
    Abstract: Communication devices and systems are disclosed. In one example, a communication device includes a LINK that performs protocol conversion of a signal from a Master and outputs the converted signal to a Slave SerDes, and of a signal from the Slave SerDes and outputs the converted signal to the Master. The LINK alternatively selects a first mode and a second mode. In the first mode, the LINK converts a 1-byte signal transmitted from the Master into a signal of a first communication standard in units of the 1-byte signal and transmits the converted signal to the Slave SerDes, then receives a signal of the first communication standard including an ACK signal representing an acknowledgement or a NACK signal representing a negative acknowledgement, and converts the received signal into a signal of a second communication standard and transmits the converted signal to the Master.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: October 29, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Junya Yamada, Satoshi Ota, Toshihisa Hyakudai
  • Publication number: 20240348462
    Abstract: Communication devices and systems with low power consumption and high speed are disclosed. In one example, a communication device includes: a state switching control circuit that controls switching between a first state in which synchronization is established with a communication partner device, a second state in which communication is started, a third state in which the communication is intermittently stopped, and a fourth state in which the communication is stopped for a longer period than the third state. A first communication control unit transmits a first signal during a first signal section in the fourth state, and a second communication control unit transmits a third signal synchronized with a received second signal to the communication partner device. When the second communication control unit transmits the third signal, the state switching control circuit causes the communication device to transition from the fourth state to the first state.
    Type: Application
    Filed: August 2, 2022
    Publication date: October 17, 2024
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota
  • Publication number: 20240348416
    Abstract: [Problem] To suppress EMI noise in serial transmission using a plurality of transmission cables. [Means of Solution] A communication device includes a plurality of communication units that, by a time division duplex (TDD) communication method, transmit a plurality of first signals at staggered times to a plurality of cables, respectively and receive a plurality of second signals at staggered times by the plurality of cables, respectively.
    Type: Application
    Filed: September 21, 2022
    Publication date: October 17, 2024
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota
  • Patent number: 12113753
    Abstract: [Object] Transmission efficiency is improved while transmission latency is minimized as possible. [Solving Means] A communication apparatus includes a communication section configured to count an interval allocated in a TDD (Time Division Duplex) mode as one TDD time slot, with a plurality of the TDD time slots counted as one period, the communication section further transmitting periodically, to a communication partner apparatus, multiple application packets corresponding to multiple serial signals generated by multiple applications, and a transmission control section configured to provide, from among the multiple TDD time slots, at least one specific TDD time slot for transmitting a limited portion of the application packets corresponding to at least two of the multiple applications, the transmission control section further shifting, in each period, priorities of the limited portion of the application packets to be transmitted in the specific TDD time slot.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: October 8, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshihisa Hyakudai, Satoshi Ota, Junya Yamada
  • Publication number: 20240330233
    Abstract: A communication device includes communication circuitry configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock to a communication partner device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods.
    Type: Application
    Filed: March 11, 2024
    Publication date: October 3, 2024
    Inventors: Toshihisa Hyakuda, Junya Yamada, Satoshi Ota
  • Publication number: 20240303215
    Abstract: Communication devices, systems and methods are disclosed. In one example, a communication device includes: a communication unit that adds identification information for identifying a data block to a set of data blocks having a serial signal group conforming to SPI transmitted from a master in synchronization with a clock, and transmits the data block to a communication partner device within one frame period of a predetermined communication protocol, or adds identification information for identifying each of the data blocks, and transmits the data block to the communication partner device in a plurality of frame periods; and a storage unit that sequentially stores a number of data blocks transmitted from the master, and then outputs a data block transmitted from the communication partner device in response to the number of data blocks, to transmit the data block to the master.
    Type: Application
    Filed: April 6, 2022
    Publication date: September 12, 2024
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota
  • Patent number: 12019580
    Abstract: Serial communication is performed at high speed by combining different communication methods. A communication device includes a communication unit configured to add, to a batch of data blocks including a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock, identification information for identifying the data blocks, and transmit the data blocks to a communication partner device within one frame period of a predetermined communication protocol, or add identification information for identifying each of a plurality of data blocks to the plurality of data blocks each including each part of the serial signal group, and transmit the data blocks to the communication partner device in a plurality of frame periods.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: June 25, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota
  • Publication number: 20240146654
    Abstract: There is provided a transmission apparatus that transmits information generated by an information source and divided for each block to a transmission path in units of frames including a plurality of the blocks, including: a transmission unit that stops the transmission of information to the transmission path or transmits toggle data to the transmission path in one of several blocks in the frame where an amount of information to be transmitted is less than a transmission capacity of the transmission path, the toggle data having a cycle of transition of information longer than that of information in a block other than the one block in the frame.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 2, 2024
    Inventors: Satoshi Ota, Toshihisa Hyakudai
  • Publication number: 20240146494
    Abstract: [Object] Transmission efficiency is improved while transmission latency is minimized as possible. [Solving Means] A communication apparatus includes a communication section configured to count an interval allocated in a TDD (Time Division Duplex) mode as one TDD time slot, with a plurality of the TDD time slots counted as one period, the communication section further transmitting periodically, to a communication partner apparatus, multiple application packets corresponding to multiple serial signals generated by multiple applications, and a transmission control section configured to provide, from among the multiple TDD time slots, at least one specific TDD time slot for transmitting a limited portion of the application packets corresponding to at least two of the multiple applications, the transmission control section further shifting, in each period, priorities of the limited portion of the application packets to be transmitted in the specific TDD time slot.
    Type: Application
    Filed: February 18, 2022
    Publication date: May 2, 2024
    Inventors: Toshihisa Hyakudai, Satoshi Ota, Junya Yamada
  • Patent number: 11971842
    Abstract: A communication device includes a communication unit configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock to a communication partner device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: April 30, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota
  • Patent number: 11960434
    Abstract: A communication device includes: a communication unit that adds, to a set of data blocks including a serial signal group conforming to SPI transmitted from a master in synchronization with a clock, identification information for identifying the data blocks, and transmits the data blocks to a communication partner device within one frame period of a predetermined communication protocol, or adds, to data blocks each including a part of the serial signal group, identification information for identifying each of the data blocks, and transmits the data blocks to the communication partner device in a plurality of frame periods; and a storage unit that sequentially stores a predetermined number of data blocks transmitted from the master and outputs a data block transmitted from the communication partner device in response to the predetermined number of data blocks from the master and stored, to transmit the data block to the master.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota
  • Patent number: 11933369
    Abstract: A clutch device includes a pressure plate movable toward or away from a clutch center and rotatable with respect to the clutch center. The pressure plate includes a flange extending radially outward from an outer circumferential edge of a body, pressure-side fitting teeth projecting in a first direction from a front surface of the flange, holding input-side rotating plates and output-side rotating plates, and circumferentially arranged, and a flange-side recessed portion recessed in the first direction from a back surface of the flange. As seen in an axial direction of an output shaft, the flange-side recessed portion at least partially overlaps one of the pressure-side fitting teeth.
    Type: Grant
    Filed: September 7, 2023
    Date of Patent: March 19, 2024
    Assignee: KABUSHIKI KAISHA F.C.C.
    Inventors: Jun Komukai, Satoshi Ota, Yasunori Higashi, Makoto Kambara
  • Publication number: 20240089074
    Abstract: Communication apparatus with correct audio signal regeneration are disclosed. In one example, a communication apparatus includes a counter that counts the number of a predetermined reference clock included in one cycle of a divided signal of an audio master clock with a frequency that is equal to a product of a frequency of a sampling clock for sampling of an audio signal and a multiplier on the basis of the audio master clock, a ratio of division of the divided signal and the predetermined reference clock. A packet generator generates a packet including the counted number counted, a bit width of SD (Serial Data) conforming to an I2S standard, the frequency of the sampling clock, the ratio of division of the divided signal to the audio master clock, a frequency ratio of the frequency of the audio master clock to the frequency of the sampling clock, and the SD.
    Type: Application
    Filed: February 3, 2022
    Publication date: March 14, 2024
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota
  • Publication number: 20240084859
    Abstract: A clutch device includes a pressure plate movable toward or away from a clutch center and rotatable with respect to the clutch center. The pressure plate includes a flange extending radially outward from an outer circumferential edge of a body, pressure-side fitting teeth projecting in a first direction from a front surface of the flange, holding input-side rotating plates and output-side rotating plates, and circumferentially arranged, and a flange-side recessed portion recessed in the first direction from a back surface of the flange. As seen in an axial direction of an output shaft, the flange-side recessed portion at least partially overlaps one of the pressure-side fitting teeth.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 14, 2024
    Inventors: Jun KOMUKAI, Satoshi OTA, Yasunori HIGASHI, Makoto KAMBARA
  • Publication number: 20240078210
    Abstract: [Object] To perform serial communication at high speed by combining different communication methods with each other. [Solving Means] A communication apparatus includes a communicating unit configured to add identification information identifying a data block to one set of the data block including a serial signal group, the serial signal group being transmitted from a master in synchronism with a clock and complying with SPI (Serial Peripheral Interface), and transmit the one set of the data block to a communication partner apparatus within one frame period of a predetermined communication protocol, or add identification information identifying each of multiple data blocks to the multiple data blocks each including a part of the serial signal group and transmit the multiple data blocks to the communication partner apparatus in multiple frame periods.
    Type: Application
    Filed: February 3, 2022
    Publication date: March 7, 2024
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota