Patents by Inventor Satoshi Sakaidani

Satoshi Sakaidani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170034827
    Abstract: A sensor information wireless transmission device has: a sensor; a converter that converts the output signal, which is a time-axis signal, of the sensor into a frequency-axis signal; an extractor that extracts from the frequency-axis signal an extraction signal spreading across a specific frequency range; and a communicator that wirelessly transmits the extraction signal.
    Type: Application
    Filed: July 7, 2016
    Publication date: February 2, 2017
    Inventors: Takashi NAIKI, Satoshi SAKAIDANI
  • Patent number: 7953234
    Abstract: A digital audio-signal output circuit is provided, which is capable of outputting an audio signal without generating pop noise. In suppressing pop noise, the audio signal output circuit requires no analog circuit nor mute control signal for external peripheral devices. Upon receipt of a digital input audio signal having an AC component superposed on a reference voltage VREF, the circuit selects one of a pulse-density-modulated audio signal derived from the input audio signal and a transition signal that smoothly varies between zero volt and the reference voltage, and provides the selected signal to speakers.
    Type: Grant
    Filed: September 21, 2005
    Date of Patent: May 31, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Satoshi Sakaidani
  • Publication number: 20070279101
    Abstract: A selection circuit switches the output between a ancillary PWM signal NSPWM and a primary PWM signal SPWM in accordance with a power supply transition period or normal period. A ancillary signal generating circuit generates a gradually rising signal which is then amplified by a second driver circuit, so that a DC block capacitor is gradually charged and discharged. Thereby, the occurrence of noise due to an inrush current is prevented.
    Type: Application
    Filed: April 20, 2005
    Publication date: December 6, 2007
    Inventors: Takeshi Onodera, Hideki Munenaga, Satoshi Sakaidani
  • Publication number: 20060013413
    Abstract: A digital audio-signal output circuit is provided, which is capable of outputting an audio signal without generating pop noise. In suppressing pop noise, the audio signal output circuit requires no analog circuit nor mute control signal for external peripheral devices. Upon receipt of a digital input audio signal having an AC component superposed on a reference voltage VREF, the circuit selects one of a pulse-density-modulated audio signal derived from the input audio signal and a transition signal that smoothly varies between zero volt and the reference voltage, and provides the selected signal to speakers.
    Type: Application
    Filed: September 21, 2005
    Publication date: January 19, 2006
    Inventor: Satoshi Sakaidani
  • Patent number: 6559674
    Abstract: There can be provided a variable function information processor in which a logic module (10) with the further decreased number of transistors used in the logic module constituting the variable function information processor is provided, a function of being able to realize both a combinational logic circuit for-performing a full addition operation of input signals in accordance with a control signal and outputting the sum and a sequential circuit for temporarily holding the input signal to delay the signal and outputting it by the same logic module is provided, and in a semiconductor circuit element group for constituting the combinational logic circuit and the sequential circuit, a common part of the combinational logic circuit and the sequential circuit is used for both the circuits, whereby the number of elements can be further decreased, and the resources of the variable function information processor can be effectively exploited.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: May 6, 2003
    Inventors: Tadahiro Ohmi, Satoshi Sakaidani, Naoto Miyamoto, Akira Nakada, Shigetoshi Sugawa
  • Publication number: 20020138530
    Abstract: There can be provided a variable function information processor in which a logic module (10) with the further decreased number of transistors used in the logic module constituting the variable function information processor is provided, a function of being able to realize both a combinational logic circuit for-performing a full addition operation of input signals in accordance with a control signal and outputting the sum and a sequential circuit for temporarily holding the input signal to delay the signal and outputting it by the same logic module is provided, and in a semiconductor circuit element group for constituting the combinational logic circuit and the sequential circuit, a common part of the combinational logic circuit and the sequential circuit is used for both the circuits, whereby the number of elements can be further decreased, and the resources of the variable function information processor can be effectively exploited.
    Type: Application
    Filed: March 19, 2002
    Publication date: September 26, 2002
    Inventors: Tadahiro Ohmi, Satoshi Sakaidani, Naoto Miyamoto, Akira Nakada, Shigetoshi Sugawa