Patents by Inventor Satoshi Shirai

Satoshi Shirai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10353454
    Abstract: According to an embodiment, an information processing apparatus includes a processing device, a first memory, a second memory, and a controller. The processing device is configured to process first data. The first memory is configured to store at least part of the first data and has an active region supplied with power necessary for holding data. The second memory is configured to store part of the first data. The controller is configured to change number of active regions such that processing information is not more than a threshold. The processing information indicates an amount of processing for moving at least part of second data stored in the first memory to the second memory and for moving at least part of third data stored in the second memory to the first memory, in a certain period for processing the first data having a size larger than active regions.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: July 16, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yusuke Shirota, Tatsunori Kanai, Shiyo Yoshimura, Satoshi Shirai
  • Publication number: 20190193800
    Abstract: A bicycle telescopic apparatus includes a first tube, a second tube, a positioning structure, a memory, and a controller. The second tube is telescopically received in the first tube and configured to be adjustably movable with respect to the first tube in a longitudinal direction of the bicycle telescopic apparatus. The positioning structure includes an electrical actuator to adjustably position the second tube relative to the first tube in the longitudinal direction. The memory is configured to store setting information for a predetermined relative position of the first tube and the second tube, and the setting information is changed via an electrical setting operation. The controller is configured to control the electrical actuator to position the second tube relative to the first tube at the predetermined relative position.
    Type: Application
    Filed: December 27, 2017
    Publication date: June 27, 2019
    Inventors: Nobukatsu Hara, Satoshi Shahana, Toyoto Shirai, Yuki Sakagawa, Yuta Kurokawa
  • Publication number: 20190175126
    Abstract: Provided is a radiation imaging apparatus capable of performing precise imaging without performing pre-imaging in the absence of a subject. According to the present invention, it is possible to provide a radiation imaging apparatus capable of performing precise imaging without performing pre-imaging in the absence of a subject immediately before. That is, the apparatus of the present invention is provided with a phase grating 5 provided with a subject area and a reference area. Both areas each have a predetermined pattern that absorbs radiation, but the patterns are different from each other. In this area, an image of the phase grating 5 is observed in a moire pattern of a long period.
    Type: Application
    Filed: March 15, 2017
    Publication date: June 13, 2019
    Inventors: Koichi TANABE, Toshinori YOSHIMUTA, Kenji KIMURA, Hiroyuki KISHIHARA, Yukihisa WADA, Takuro IZUMI, Taro SHIRAI, Takahiro DOKI, Satoshi SANO, Akira HORIBA
  • Publication number: 20190167219
    Abstract: This X-ray phase contrast imaging apparatus (100) includes an X-ray source (1) that radiates continuous X-rays, a first grating (3) that forms a self-image, a second grating (4), a detector (5) that detects the continuous X-rays, and a third grating (2) arranged between the detector (5) and the first grating 3. The first grating (3), the second grating (4), and the third grating (2) are arranged so as to satisfy conditions of predetermined formulas.
    Type: Application
    Filed: July 10, 2017
    Publication date: June 6, 2019
    Inventors: Satoshi SANO, Koichi TANABE, Toshinori YOSHIMUTA, Kenji KIMURA, Hiroyuki KISHIHARA, Yukihisa WADA, Takuro IZUMI, Taro SHIRAI, Takahiro DOKI, Akira HORIBA, Takayoshi SHIMURA, Heiji WATANABE, Takuji HOSOI
  • Patent number: 10295678
    Abstract: A X-ray detector having enhanced X-ray sensitivity, which enables dual energy imaging having high diagnostic performance. This X-ray detector includes: scintillator elements which are partitioned by light blocking walls and which convert low-energy X-rays to light; and scintillator elements which are partitioned by light blocking walls and which convert high-energy X-rays to light. When seen from the direction of incidence of the X-rays, the positional pattern of the light blocking walls and that of the light blocking walls are configured so as not to be in alignment with each other. Accordingly, the X-rays incident on the X-ray detector are converted to light by at least either one of the scintillator elements and are finally outputted as X-ray detection signals.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: May 21, 2019
    Assignee: Shimadzu Corporation
    Inventors: Koichi Tanabe, Shingo Furui, Toshinori Yoshimuta, Kenji Kimura, Akihiro Nishimura, Taro Shirai, Takahiro Doki, Satoshi Sano, Akira Horiba, Toshiyuki Sato
  • Patent number: 10281970
    Abstract: According to an embodiment, a control device includes a calculator and a setting unit. The calculator is configured to calculate a system processing time indicating a time required for processing executed after a system, the system including a plurality of elements, power to each element being individually controlled, resumes from a sleep state in which the number of elements supplied with power is limited to a predetermined number and an operation of the system is stopped. The setting unit is configured to set a mode indicating an operation state of the system according to the system processing time calculated by the calculator when a resume factor indicating a factor for resuming the system from the sleep state occurs.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: May 7, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroyoshi Haruki, Koichi Fujisaki, Junichi Segawa, Satoshi Shirai, Yusuke Shirota, Akihiro Shibata, Masaya Tarui, Tetsuro Kimura, Tatsunori Kanai, Haruhiko Toyama
  • Patent number: 10241934
    Abstract: According to an embodiment, upon receiving a use request including an identifier of a program and authentication information, a use request processing unit makes a determination on validity of the use request based on an ID management information and access authority management information, generates an access key when the use request is valid, registers the access key in access key management information in correlation with a usable address range, and returns the access key to a transmission source of the use request. Upon receiving a read/write request including an address where reading-out or writing of data is performed and an access key, a read/write request processing unit makes a determination on validity of the read/write request based on the access key management information, and executes reading-out or writing of data with respect to a shared memory in response to the read/write request when the read/write request is valid.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: March 26, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Satoshi Shirai, Tatsunori Kanai, Yusuke Shirota
  • Patent number: 10235049
    Abstract: A management device according to an embodiment manages reading and writing of data, by a processing circuit, from and into a first memory unit and a non-volatile memory unit containing a plurality of pages, and includes a setting storage unit, an access processing circuit, and a management circuit. The setting storage unit stores an access method indicating whether first access processing of writing and reading data into and from data transferred to the first memory unit from the non-volatile memory unit or second access processing of directly writing and reading data into and from data stored in the non-volatile memory unit is executed for each of the pages. The management circuit changes the access method for a third page on which the second access processing is set to be performed to the first access processing when quality of the third page is equal to or lower than a reference value.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: March 19, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Shirota, Tatsunori Kanai, Satoshi Shirai, Shiyo Yoshimura
  • Publication number: 20190079366
    Abstract: Disclosed herein is an optical waveguide element that includes a substrate and a waveguide layer formed on the substrate and comprising lithium niobate. The waveguide layer has a slab part having a predetermined thickness and a ridge part protruding from the slab part. The maximum thickness of the slab part is 0.05 times or more and less than 0.4 times a wavelength of a light propagating in the ridge part.
    Type: Application
    Filed: November 9, 2018
    Publication date: March 14, 2019
    Applicant: TDK Corporation
    Inventors: Shinji IWATSUKA, Kenji Sasaki, Satoshi Shirai
  • Patent number: 10203583
    Abstract: Disclosed herein is an optical waveguide element that includes a substrate and a waveguide layer formed on the substrate and comprising lithium niobate. The waveguide layer has a slab part having a predetermined thickness and a ridge part protruding from the slab part. The maximum thickness of the slab part is 0.05 times or more and less than 0.4 times a wavelength of a light propagating in the ridge part.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: February 12, 2019
    Assignee: TDK CORPORATION
    Inventors: Shinji Iwatsuka, Kenji Sasaki, Satoshi Shirai
  • Patent number: 10203740
    Abstract: According to an embodiment, an information processing device includes a memory device, one or more peripheral devices, a processor, and a state controller. The processor is able to change between a first state, in which a command is executed, and a second state, in which an interrupt is awaited. When the processor enters the second state and if an operation for data transfer is being performed between at least one of the peripheral devices and the memory device, the state controller switches the information processing device to a third state in which power consumption is lower as compared to the first state. If the operation for data transfer is not being performed between any of the peripheral devices and the memory device, the state controller switches the information processing device to a fourth state in which power consumption is lower as compared to the third state.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: February 12, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Junichi Segawa, Tatsunori Kanai, Tetsuro Kimura, Koichi Fujisaki, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura, Haruhiko Toyama
  • Publication number: 20180277224
    Abstract: According to one embodiment, a memory device is connected to one or more information processing devices. The memory device includes a shared memory and a memory controller. The memory controller is configured to analyze an access to the shared memory by the one or more information processing devices and decide on an access method for accessing the shared memory by the one or more information processing devices. The memory controller is configured to give an instruction indicating the decided access method to the one or more information processing devices.
    Type: Application
    Filed: September 5, 2017
    Publication date: September 27, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Yusuke SHIROTA, Tatsunori KANAI, Satoshi SHIRAI
  • Publication number: 20180267906
    Abstract: According to an embodiment, upon receiving a use request including an identifier of a program and authentication information, a use request processing unit makes a determination on validity of the use request based on an ID management information and access authority management information, generates an access key when the use request is valid, registers the access key in access key management information in correlation with a usable address range, and returns the access key to a transmission source of the use request. Upon receiving a read/write request including an address where reading-out or writing of data is performed and an access key, a read/write request processing unit makes a determination on validity of the read/write request based on the access key management information, and executes reading-out or writing of data with respect to a shared memory in response to the read/write request when the read/write request is valid.
    Type: Application
    Filed: September 5, 2017
    Publication date: September 20, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Satoshi SHIRAI, Tatsunori Kanai, Yusuke Shirota
  • Publication number: 20180260127
    Abstract: A management device according to an embodiment manages reading and writing of data, by a processing circuit, from and into a first memory unit and a non-volatile memory unit containing a plurality of pages, and includes a setting storage unit, an access processing circuit, and a management circuit. The setting storage unit stores an access method indicating whether first access processing of writing and reading data into and from data transferred to the first memory unit from the non-volatile memory unit or second access processing of directly writing and reading data into and from data stored in the non-volatile memory unit is executed for each of the pages. The management circuit changes the access method for a third page on which the second access processing is set to be performed to the first access processing when quality of the third page is equal to or lower than a reference value.
    Type: Application
    Filed: August 16, 2017
    Publication date: September 13, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Shirota, Tatsunori Kanai, Satoshi Shirai, Shiyo Yoshimura
  • Publication number: 20180253374
    Abstract: According to an embodiment, a management device includes a counter storage unit, a first management information storage unit, and an update unit. The first management information storage unit stores a first management table capable of storing first management information about each of a predetermined number of first areas. The first management information indicates whether each second area included in a corresponding first area has data written therein. In response to writing of first data into the nonvolatile memory, when a state of a target second area indicated in the first management information about a target first area is an unwritten state, the update unit changes the state of the target second area to a written state; while when the state of the target second area indicated in the first management information is the written state, the update unit updates the counter value for the target first area.
    Type: Application
    Filed: August 29, 2017
    Publication date: September 6, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shiyo YOSHIMURA, Tatsunori KANAI, Yusuke SHIROTA, Satoshi SHIRAI
  • Publication number: 20180188629
    Abstract: Disclosed herein is an optical waveguide element that includes a substrate and a waveguide layer formed on the substrate and comprising lithium niobate. The waveguide layer has a slab part having a predetermined thickness and a ridge part protruding from the slab part. The maximum thickness of the slab part is 0.05 times or more and less than 0.4 times a wavelength of a light propagating in the ridge part.
    Type: Application
    Filed: February 27, 2018
    Publication date: July 5, 2018
    Applicant: TDK Corporation
    Inventors: Shinji Iwatsuka, Kenji Sasaki, Satoshi Shirai
  • Patent number: 9939709
    Abstract: Disclosed herein is an optical waveguide element that includes a substrate and a waveguide layer formed on the substrate and comprising lithium niobate. The waveguide layer has a slab part having a predetermined thickness and a ridge part protruding from the slab part. The maximum thickness of the slab part is 0.05 times or more and less than 0.4 times a wavelength of a light propagating in the ridge part.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: April 10, 2018
    Assignee: TDK CORPORATION
    Inventors: Shinji Iwatsuka, Kenji Sasaki, Satoshi Shirai
  • Patent number: 9923642
    Abstract: A light receiving device that receives a light signal includes: a plurality of avalanche photodiodes, in each of which receiving sensitivity is set in accordance with a bias signal that is provided; a plurality of level conversion units provided in association with the avalanche photodiodes, each of the level conversion units being configured to convert a level of a reference voltage for obtaining the bias signal so as to generate the bias signal and being configured to provide the bias signal to corresponding one of the avalanche photodiodes; and a control unit that generates a first control signal corresponding to a temperature of the light receiving device, and controls a level conversion amount of each of the level conversion units by using the first control signal.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: March 20, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Satoshi Shirai, Masaki Noda
  • Patent number: 9904350
    Abstract: A recognition device includes a storage unit, an acquiring unit, a first calculator, a second calculator, a determining unit, and an output unit. The storage unit stores multiple training patterns each belonging to any one of multiple categories. The acquiring unit acquires a recognition target pattern to be recognized. The first calculator calculates, for each of the categories, a distance histogram representing distribution of the number of training patterns belonging to the category with respect to distances between the recognition target pattern and the training patterns belonging to the category. The second calculator analyzes the distance histogram of each of the categories to calculate confidence of the category. The determining unit determines a category of the recognition target pattern from the multiple categories by using the confidences. The output unit outputs the category of the recognition target pattern.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: February 27, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroyoshi Haruki, Masaya Tarui, Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai, Junichi Segawa, Satoshi Shirai, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura, Haruhiko Toyama
  • Publication number: 20180019825
    Abstract: A light receiving device that receives a light signal includes: a plurality of avalanche photodiodes, in each of which receiving sensitivity is set in accordance with a bias signal that is provided; a plurality of level conversion units provided in association with the avalanche photodiodes, each of the level conversion units being configured to convert a level of a reference voltage for obtaining the bias signal so as to generate the bias signal and being configured to provide the bias signal to corresponding one of the avalanche photodiodes; and a control unit that generates a first control signal corresponding to a temperature of the light receiving device, and controls a level conversion amount of each of the level conversion units by using the first control signal.
    Type: Application
    Filed: February 23, 2015
    Publication date: January 18, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Satoshi SHIRAI, Masaki NODA