Patents by Inventor Satoshi Tatara

Satoshi Tatara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10998328
    Abstract: A semiconductor memory device includes a stacked body, a semiconductor member, and a first insulating member. Electrode films and insulating films are alternately stacked along a first direction in the stacked body. An end part of the stacked body is shaped like a staircase in which a terrace is formed for each of the electrode films. A portion of the electrode film placed in the end part is thicker than a portion of the electrode film placed in a central part of the stacked body. The semiconductor member extends in the first direction and penetrates through the central part of the stacked body. The first insulating member extends in the first direction and is provided in the end part.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: May 4, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Osamu Matsuura, Satoshi Tatara
  • Publication number: 20180261608
    Abstract: A semiconductor memory device includes a stacked body, a semiconductor member, and a first insulating member. Electrode films and insulating films are alternately stacked along a first direction in the stacked body. An end part of the stacked body is shaped like a staircase in which a terrace is formed for each of the electrode films. A portion of the electrode film placed in the end part is thicker than a portion of the electrode film placed in a central part of the stacked body. The semiconductor member extends in the first direction and penetrates through the central part of the stacked body. The first insulating member extends in the first direction and is provided in the end part.
    Type: Application
    Filed: March 9, 2018
    Publication date: September 13, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Osamu MATSUURA, Satoshi TATARA
  • Patent number: 9286849
    Abstract: A display unit includes: a pixel array section configured of pixels arranged in a matrix form, each of the pixels including an electro-optical device, a drive transistor, and a write transistor, the drive transistor configured to drive the electro-optical device, and the write transistor connected between a signal line and a gate electrode of the drive transistor and configured of a plurality of transistor devices connected to one another in series; and a drive circuit section configured to drive each of the pixels of the pixel array section, in which a potential of an intermediate node between two transistor devices selected from the plurality of transistor devices configuring the write transistor is turned to an intermediate potential between a potential of the signal line and a potential of the gate electrode of the drive transistor after completion of signal writing by the write transistor.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: March 15, 2016
    Assignee: JOLED INC.
    Inventor: Satoshi Tatara
  • Publication number: 20140231805
    Abstract: A display unit is provided with pixels arranged in a matrix form, and each of the pixels includes: an electro-optical device; a transistor; and a capacitor formed by providing a metal layer between a first semiconductor layer and a second semiconductor layer, the first semiconductor layer forming a source region and a drain region of the transistor, and the second semiconductor layer formed in a layer different from a layer where the first semiconductor layer is formed, in which a voltage allowing a capacity value of the capacitor to be increased is applied to the metal layer during light emission from the electro-optical device.
    Type: Application
    Filed: February 10, 2014
    Publication date: August 21, 2014
    Applicant: Sony Corporation
    Inventor: Satoshi Tatara
  • Publication number: 20140232703
    Abstract: A display unit includes: a pixel array section configured of pixels arranged in a matrix form, each of the pixels including an electro-optical device, a drive transistor, and a write transistor, the drive transistor configured to drive the electro-optical device, and the write transistor connected between a signal line and a gate electrode of the drive transistor and configured of a plurality of transistor devices connected to one another in series; and a drive circuit section configured to drive each of the pixels of the pixel array section, in which a potential of an intermediate node between two transistor devices selected from the plurality of transistor devices configuring the write transistor is turned to an intermediate potential between a potential of the signal line and a potential of the gate electrode of the drive transistor after completion of signal writing by the write transistor.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 21, 2014
    Applicant: Sony Corporation
    Inventor: Satoshi Tatara
  • Publication number: 20120293397
    Abstract: Disclosed herein is a bootstrap circuit including: a transistor; and a capacitor connected between a gate electrode of the transistor, and one of source and drain regions of the transistor, the bootstrap circuit serving to carry out a bootstrap operation in which an electric potential at the gate electrode is changed depending on a change in an electric potential at the one of the source and drain regions, in which the transistor has a structure in which the source region and the drain region have a structure of being asymmetric with respect to a line passing through a center of the gate electrode.
    Type: Application
    Filed: April 30, 2012
    Publication date: November 22, 2012
    Applicant: Sony Corporation
    Inventors: Satoshi Tatara, Katsuhide Uchino
  • Publication number: 20120286275
    Abstract: A display device has pixels including electro-optical elements and transistors. Each pixel has a metal layer of a gate electrode of the transistor, a semiconductor layer in which a source region and a drain region of the transistor are formed, and a capacitance element formed between the same metal layer as the metal layer of the gate electrode and the semiconductor layer upon application of a voltage to the metal layer.
    Type: Application
    Filed: April 9, 2012
    Publication date: November 15, 2012
    Applicant: SONY CORPORATION
    Inventors: Satoshi Tatara, Katsuhide Uchino
  • Publication number: 20120287092
    Abstract: A display device includes a control line through which a drive signal output from a driver is transmitted and transistors arranged along a direction in which the control line extends and driven with the drive signal transmitted through the control line. Parasitic capacitances between gates and sources/drains of the transistors are varied in accordance with distances thereof from the driver in the direction in which the control line extends.
    Type: Application
    Filed: April 24, 2012
    Publication date: November 15, 2012
    Applicant: SONY CORPORATION
    Inventors: Satoshi Tatara, Keisuke Omoto, Katsuhide Uchino
  • Publication number: 20110234925
    Abstract: A display device includes: a display unit having a plurality of pixels each including a light emitting element, a drive transistor and a correction transistor, a scan line, a signal line, a power supply line and a gate line connected to the pixels; a scan line drive circuit applying a selection pulse to the scan line; and a signal line drive circuit writing a video signal to a pixel selected by the scan line drive circuit by applying a video signal voltage to the signal line. The drive transistor and the correction transistor are connected to each other in series on a path between the power supply line and the light emitting element in each of the pixels. Gate voltage for correction to be applied to the gate of the correction transistor via the gate line is set individually in each of unit regions in the display unit.
    Type: Application
    Filed: February 17, 2011
    Publication date: September 29, 2011
    Applicant: Sony Corporation
    Inventors: Satoshi Tatara, Katsuhide Uchino
  • Publication number: 20100259532
    Abstract: Disclosed herein is a display device including: a pixel array configured to include pixel circuits that are arranged in a matrix and each have at least a light emitting element, a switching transistor for inputting a signal value supplied to a signal line, and a drive transistor for current application to the light emitting element dependent on the input signal value; a signal value output unit configured to output signal values given to the pixel circuits in the pixel array to the signal lines disposed on the pixel array; and a write controller configured to give, to the pixel circuits on a line-by-line basis, scan pulses for carrying out conduction control of the switching transistor and inputting the signal value on the signal line to the pixel circuit, and allow the scan pulses given to lines to each have a pulse waveform set depending on mobility of the drive transistors in a corresponding one of the lines of the pixel array.
    Type: Application
    Filed: March 9, 2010
    Publication date: October 14, 2010
    Applicant: Sony Corporation
    Inventors: Satoshi Tatara, Masatsugu Tomida, Naobumi Toyomura, Katsuhide Uchino