Abstract: An image forming apparatus includes an image forming mechanism and an image fixing unit. The image forming mechanism forms a toner image on a recording sheet. The image fixing unit fixes the toner image onto the recording sheet. The image fixing unit includes a magnetic flux generator, a heat member, a magnetic flux adjuster, and a controlling member. The magnetic flux generator generates a magnetic flux. The heat member is heated inductively by the magnetic flux generated by the magnetic flux generator. The magnetic flux adjuster reduces the magnetic flux active on the heat member to form a heat reduction area in an outer circumferential surface of the heat member in a width direction thereof. The controlling member moves the magnetic flux adjuster to change the heat reduction area.

Abstract: An image processing apparatus includes a selection section for selecting and retrieving a significant part in terms of resolution from a bit steam of an image signal which is input to each pixel of an image display apparatus; and an extension and correction section for extending and correcting the significant parts of the image signals selected by the selection section in a low-frequency part which includes a plurality of consecutive image signals having a first signal value and a plurality of consecutive image signals having a second signal value which is different from the first signal value by a prescribed value, wherein the significant parts are each extended and corrected by being supplemented with a prescribed number of bits, such that the first signal value smoothly changes to the second signal value.

Abstract: Means for forming a package is disclosed on which is mounted a semiconductor chip with a high-speed LSI formed thereon, using a wire bonding method. The package comprises a semiconductor chip, a die pad smaller than a main surface of the semiconductor chip, a sealing member, plural leads each comprising an outer terminal portion and an inner lead portion, and plural bonding wires for connection between bonding pads formed on the semiconductor chip and the inner lead portions of the leads, each of the inner lead portions being bent in a direction away from a mounting surface of the sealing member, thereby approximating the height of the chip-side bonding pads and that of a bonding position of the inner lead portions to each other, whereby the wire length can be made shorter and it is possible to suppress an increase in inductance of the wire portions and attain impedance matching at various portion of a high-frequency signal input/output transmission path.

Abstract: A fixing apparatus and an image formation apparatus therewith are disclosed. According to the fixing apparatus, a heating range that is heated by electromagnetic induction caused by a current flowing through a coil unit is finely tunable by covering a part of a core unit with a shielding member. Further, the core unit has a projecting section at an end of the core unit, which projecting section projects toward the coil unit in comparison with the central part of the core unit.

Abstract: Means for forming a package is disclosed on which is mounted a semiconductor chip with a high-speed LSI formed thereon, using a wire bonding method. The package comprises a semiconductor chip, a die pad smaller than a main surface of the semiconductor chip, a sealing member, plural leads each comprising an outer terminal portion and an inner lead portion, and plural bonding wires for connection between bonding pads formed on the semiconductor chip and the inner lead portions of the leads, each of the inner lead portions being bent in a direction away from a mounting surface of the sealing member, thereby approximating the height of the chip-side bonding pads and that of a bonding position of the inner lead portions to each other, whereby the wire length can be made shorter and it is possible to suppress an increase in inductance of the wire portions and attain impedance matching at various portion of a high-frequency signal input/output transmission path.

Abstract: A semiconductor integrated circuit device includes a transmitting circuit capable of converting first parallel signals to a first serial signal, a receiving circuit capable of converting a second serial signal to second parallel signals, a test signal generating circuit, and an operation judging circuit, all of which are formed on a single semiconductor chip. The test signal generating circuit and the operation judging circuit are formed so as to operate in accordance with a clock having a frequency corresponding to a transfer rate of the first or second parallel signals.

Abstract: In a circuit for converting an input signal Data1 of high frequency to an output signal Data4 of low frequency, a signal of the frequency band (for example, 10 GHz to 2.5 GHz) which can be processed only with a bipolar ECL circuit is processed with a bipolar ECL circuit. After the frequency of signal up to the maximum frequency which can be processed with a CMOS circuit is lowered, the signal is inputted to the CMOS circuit via a level conversion circuit in order to lower the frequency (for example, 2.5 GHz to 1.25 GHz). Thereby, power consumption of the semiconductor integrated circuit device, particularly the device including the Bi-CMOS circuit can be lowered while high-seed processing characteristic in the signal process of the circuit is maintained.

Abstract: A game system is provided with a converting means including a voice input member, such as a microphone, for allowing the game player or his/her friend to input voices and for converting the inputted voices into electrical signal data, a sound data storage for storing the electrical signal data obtained by the conversion together with predetermined sound-relating data corresponding to contents of instructions, a sound generator for generating voices from the corresponding electrical signal data when a game player makes a motion in response to the content of instruction, and a device for evaluating a game result based on the content of instruction. Accordingly, a sound output type game system which can provide more interesting and enjoyable games can be realized.

Abstract: In a circuit for converting an input signal Data1 of high frequency to an output signal Data4 of low frequency, a signal of the frequency band (for example, 10 GHz to 2.5 GHz) which can be processed only with a bipolar ECL circuit is processed with a bipolar ECL circuit. After the frequency of signal up to the maximum frequency which can be processed with a CMOS circuit is lowered, the signal is inputted to the CMOS circuit via a level conversion circuit in order to lower the frequency (for example, 2.5 GHz to 1.25 GHz). Thereby, power consumption of the semiconductor integrated circuit device, particularly the device including the Bi-CMOS circuit can be lowered while high-seed processing characteristic in the signal process of the circuit is maintained.

Abstract: A disk (6) is horizontally rotated a half-turn by a motor (7) in a rotational direction and, then, is rotated a half-turn in an opposite rotational direction. Two servomotors (8, 9) are symmetrically disposed, on an upper surface of the disk (6), with respect to a rotating shaft of the disk (6). Driving shafts (22, 23), driven by the two servomotors (8, 9), downwardly extend through the disk (6), and move hanging members (K, M), respectively, in upward-and-downward directions. Two hanging members (K, M) are provided, at their lower ends, with clampers (32), respectively. The clampers (32) are each provided, at their bottom surfaces, with a suction pad (35), and are provided, at their upper surfaces, with pneumatic cylinders (28, 29). The pressure of the compressed air supplied to the pneumatic cylinder is adjusted by a pressure regulating device (38).

Abstract: Means for forming a package is disclosed on which is mounted a semiconductor chip with a high-speed LSI formed thereon, using a wire bonding method. The package comprises a semiconductor chip, a die pad smaller than a main surface of the semiconductor chip, a sealing member, plural leads each comprising an outer terminal portion and an inner lead portion, and plural bonding wires for connection between bonding pads formed on the semiconductor chip and the inner lead portions of the leads, each of the inner lead portions being bent in a direction away from a mounting surface of the sealing member, thereby approximating the height of the chip-side bonding pads and that of a bonding position of the inner lead portions to each other, whereby the wire length can be made shorter and it is possible to suppress an increase in inductance of the wire portions and attain impedance matching at various portion of a high-frequency signal input/output transmission path.

Abstract: A double-laterally-wound two-core parallel extrafine coaxial cable includes two cores, having internal conductors whose outer peripheries are covered with insulators and disposed in parallel with each other. A first laterally-wound shield is applied to the outer periphery of the two cores. A second laterally-wound shield is applied to the outer periphery of the first laterally-wound shield in a direction opposite to that of the first laterally-wound shield. A composite tape, which includes a plastic tape having a vapor-deposited metal layer formed on one surface thereof, is wound around the outer periphery of the second laterally-wound shield such that the vapor-deposited metal layer faces the second laterally-wound shield. A jacket covers the outer periphery of the composite tape. Each of the cores has a core outer diameter, and the laterally-wound shields are formed of wire having a wire diameter.

Abstract: A layered stranded conductor has an inner layer section and an outer layer section. The inner layer section has one or more inner section element wires, including a first element wire having an outer diameter of 0.08 mm or less. The outer layer section has one or more outer section element wires, including a second element wire stranded with the first element wire and an outer diameter of 0.08 mm or less. The first element wire has 1.5 times or higher tensile strength than that of a second element wire. Additionally, the one or more inner and the one or more outer section element wires are stranded with each other such that a ratio of a strength of the one or more inner section wires to a strength of the one or more outer section wires is 0.5 to 5.

Abstract: An image processing apparatus, for processing an image signal representing pixel values of pixels so as to display an image including the pixels by an image display apparatus, includes a detection section for detecting a low frequency portion of the image signal, which corresponds to a first series of pixels having a first pixel value and a second series of pixels having a second pixel value different from the first pixel value, the second series of pixels following the first series of pixels; and a signal expansion section for expanding a prescribed portion of the low frequency portion of the image signal, the prescribed portion including at least one of the first series of pixels and the second series of pixels, such that the first pixel value is gradually changed to the second pixel value.

Abstract: In a circuit for converting an input signal Datal of high frequency to an output signal Data4 of low frequency, a signal of the frequency band (for example, 10 GHz to 2.5 GHz) which can be processed only with a bipolar ECL circuit is processed with a bipolar ECL circuit. After the frequency of signal up to the maximum frequency which can be processed with a CMOS circuit is lowered, the signal is inputted to the CMOS circuit via a level conversion circuit in order to lower the frequency (for example, 2.5 GHz to 1.25 GHz). Thereby, power consumption of the semiconductor integrated circuit device, particularly the device including the Bi-CMOS circuit can be lowered while high-seed processing characteristic in the signal process of the circuit is maintained.

Abstract: A method for driving a liquid crystal display device is provided.

Abstract: A display device controls a signal applied to the n dots such that a sum of luminance of n dots (n is an integer of 1 or more) is virtually equal to an original luminance of the defective dot on the assumption that the n dots, which are adjacent to an electrically uncontrollable dot, are not originally illuminated. The display device also controls a signal applied to dots adjacent to the defective dot so as to display a color which is closer to an original color obtained by input signals to the defective dot and the adjacent dots.

Abstract: Disclosed herein is a communication module, comprising a semiconductor chip in which channels for allowing signal converting means to convert current signals inputted from input terminals to voltage signals and outputting the same from output terminals respectively are arranged in parallel in plural form, and wherein the semiconductor chip is comprised principally of a semiconductor substrate in which a second semiconductor layer is provided on a first semiconductor layer with an insulating layer interposed therebetween, each of the signal converting means is formed in a channel forming region of the second semiconductor layer, which is defined for each channel, and the input and output terminals are formed on the channel forming regions of the second semiconductor layer with the insulating layer interposed therebetween.

Abstract: A stranded conductor 10 to be used for movable member having a two-layered structure of an inner layer section and an outer layer section, which is prepared by stranding two or more types of element wires with each other, each type having different mechanical properties from one another wherein a first element wire 11 constituting at least the inner layer section 13 has 1.5 times or higher tensile strength than that of a second element wire 12 constituting at least a part of the outer layer section 15, and the respective element wires 11 and 12 are stranded with each other in such that a ratio of a strength in a group of inner layer element wires forming the inner layer section 13 to a strength in a group of outer layer element wires forming the outer layer section 15 (a tensile strength in the group of inner layer element wires/a tensile strength in the group of outer layer element wires) comes to be 0.5 to 5.

Abstract: A double-laterally-wound two-core parallel extrafine coaxial cable is composed of two cores having internal conductors (2a, 2b) whose outer peripheries are covered with insulators (3a, 3b) and disposed in parallel with each other, a first laterally-wound shield (5) applied to the outer periphery of the two cores (4a, 4b), a second laterally-wound shield (6) applied to the outer periphery of the first laterally-wound shield in a direction opposite to that of the first laterally-wound shield, a composite tape (9), which is composed of a plastic tape (7) having a vapor-deposited metal layer formed on one surface thereof, wound around the outer periphery of the second laterally-wound shield such that the vapor-deposited metal layer faces the second laterally-wound shield, and a jacket (10) covering the outer periphery of the composite tape.