Abstract: A surface region of a first base layer is formed with a second base layer. Trenches are formed over a range from the surface of the second base layer to the first base layer. The second base layer is divided into base layers. Each of first trenches is formed with a trench gate electrode. An emitter layer is formed in a surface region of the base layer intermittently selected from base layers positioned between first trenches, and contacts with the trench. Dummy trenches are formed over a range from the surface of the base region where the emitter layer is not formed to the first base layer at a position near to each of trenches. A diffusion region is formed in the first base layer to contact with the side portion of dummy trenches formed at the bottom of each trench and a position near thereto.

Abstract: A semiconductor device comprises a semiconductor layer of a first conductivity type; a first semiconductor pillar layer of the first conductivity type provided on a major surface of the semiconductor layer; a second semiconductor pillar layer of a second conductivity type provided adjacent to the first semiconductor pillar layer; a semiconductor region of the first conductivity type provided between the semiconductor layer and the second semiconductor pillar layer, the semiconductor region having a lower impurity concentration than the semiconductor layer; a semiconductor base layer of the second conductivity type provided on the second semiconductor pillar layer; a semiconductor source region of the first conductivity type selectively provided in the surface of the semiconductor base layer; a gate insulating film provided on the semiconductor base layer between the semiconductor source region and the first semiconductor pillar layer; and a gate electrode provided on the gate insulating film.

Abstract: A semiconductor device is disclosed, which comprises a terminal section formed to surround a device active region. The terminal section includes a trench formed in the semiconductor layer, and a filler filled in the trench. A field plate is extended to above the trench from an electrode of the semiconductor element formed in the device active region.

Abstract: There is provided a power MISFET which includes a semiconductor region of a first conductivity, a semiconductor base region of a second conductivity, a pillar region, a first major electrode region of a first conductivity on the base region, a second major electrode region connected with at least the semiconductor region and a part of the pillar region, a control electrode and an electrode pad connected with the control electrode. The pillar region including a first region of a first conductivity type and a second region of a second conductivity type is not formed under the electrode pad. Also, a method for manufacturing a MISFET is provided.

Abstract: A semiconductor device comprises a semiconductor element and a conductive member. The semiconductor element has a semiconductor substrate having first and second major surfaces; a semiconductor layer formed on the first major surface of the semiconductor substrate; a plurality of trenches formed on the semiconductor layer, the trenches being parallel to each other and extending to a first direction; filling material filling the trenches; a first electrode pad provided on the semiconductor layer and connected electrically to a first major electrode; a second major electrode provided on the second major surface; and a gate electrode pad provided on the semiconductor layer and connected to a gate electrode which controls conduction between the first major electrode and the second major electrode. The conductive member is connected to at least one of the first electrode pad and the gate electrode pad via a first contact area.

Abstract: A surface region of a first base layer is formed with a second base layer. Trenches are formed over a range from the surface of the second base layer to the first base layer. The second base layer is divided into base layers. Each of first trenches is formed with a trench gate electrode. An emitter layer is formed in a surface region of the base layer intermittently selected from base layers positioned between first trenches, and contacts with the trench. Dummy trenches are formed over a range from the surface of the base region where the emitter layer is not formed to the first base layer at a position near to each of trenches. A diffusion region is formed in the first base layer to contact with the side portion of dummy trenches formed at the bottom of each trench and a position near thereto.

Abstract: A surface region of a first base layer is formed with a second base layer. Trenches are formed over a range from the surface of the second base layer to the first base layer. The second base layer is divided into base layers. Each of first trenches is formed with a trench gate electrode. An emitter layer is formed in a surface region of the base layer intermittently selected from base layers positioned between first trenches, and contacts with the trench. Dummy trenches are formed over a range from the surface of the base region where the emitter layer is not formed to the first base layer at a position near to each of trenches. A diffusion region is formed in the first base layer to contact with the side portion of dummy trenches formed at the bottom of each trench and a position near thereto.

Abstract: A surface region of a first base layer is formed with a second base layer. Trenches are formed over a range from the surface of the second base layer to the first base layer. The second base layer is divided into base layers. Each of first trenches is formed with a trench gate electrode. An emitter layer is formed in a surface region of the base layer intermittently selected from base layers positioned between first trenches, and contacts with the trench. Dummy trenches are formed over a range from the surface of the base region where the emitter layer is not formed to the first base layer at a position near to each of trenches. A diffusion region is formed in the first base layer to contact with the side portion of dummy trenches formed at the bottom of each trench and a position near thereto.

Abstract: A semiconductor device including a semiconductor chip having first and second principal surfaces is disclosed. The semiconductor chip includes a first electrode formed on the first principal surface and a second electrode formed on the second principal surface. A first lead frame includes a first connecting portion connected to the first electrode and a first terminal portion. A second lead frame includes a second connecting portion connected to the second electrode and a second terminal portion. The semiconductor chip is sealed by a housing. The housing is formed so as not to cover part of surfaces of the first and second connecting portions.

Abstract: A pressure-contact type semiconductor device comprises a plurality of semiconductor elements (IGBTs) which are in pressure contact with one another, and in which first main electrodes are electrically connected to a first common main power source plate (pressure-contact type emitter electrode plate), and second main electrodes are electrically connected to a second common main power source plate (pressure-contact type collector electrode). The pressure-contact type semiconductor device also includes a common control signal board which is constituted by a printed circuit board or a multi-layered printed circuit board, and extends over spaces between rows of semiconductor elements, thereby forming a path for sending a control signal.

Abstract: A pressure-contact type semiconductor device comprises a plurality of semiconductor elements (IGBTs) which are in pressure contact with one another, and in which first main electrodes are electrically connected to a first common main power source plate (pressure-contact type emitter electrode plate), and second main electrodes are electrically connected to a second common main power source plate (pressure-contact type collector electrode). The pressure-contact type semiconductor device also includes a common control signal board which is constituted by a printed circuit board or a multi-layered printed circuit board, and extends over spaces between rows of semiconductor elements, thereby forming a path for sending a control signal.

Abstract: A pressure-contact type semiconductor device such as an insulated gate bipolar transistor. The device includes semiconductor chip, a gate electrode on a first surface of the semiconductor chip, an emitter electrode insulated and separated from the gate electrode, and an emitter sensing electrode on the first surface of the semiconductor chip. A collector layer is on the second surface of the semiconductor chip. The emitter sensing electrode monitors the emitter voltage. Because the emitter sensing electrode is on the semiconductor chip, the emitter sensing electrode is not influenced by inductance between an emitter and an emitter terminal.

Abstract: Keys forming a data inputting part to input such data as characters are formed of mechanical switches large in the operating stroke so that data of many inputting key operations may be input by a blind touch and keys forming a function executing part to execute preset functions are formed of flat switches having substantially no operating stroke and covered with a water-proof cover so as to be able to be simply cleaned even in case the functions are operated to be executed with dirty hands while the medical apparatus is being used.

Abstract: A reverse conducting gate-turnoff thyristor includes a switching device section, a diode section, and an isolating section located between the switching device section and the diode section. The isolating section includes an impurity layer formed by controlling impurity diffusion and having an impurity concentration lower than those of the switching device section and the diode section.

Abstract: A plurality of segments of small-sized IGBT devices are arranged concentrically in a plurality of rows in a pellet substrate. Each segment has an independent polysilicon gate electrode layer. A gate electrode terminal lead-out portion is provided at a central portion of the pellet substrate. A metal gate electrode layer electrically connects the polysilicon gate electrode layer of at least one of the segments of a unit, which unit is constituted by at least one of the segments arranged radially from the central portion of the pellet substrate towards a peripheral portion of the pellet substrate, to the gate electrode terminal lead-out portion. The metal gate electrode layer includes a trunk wiring portion extending radially from the gate electrode terminal lead-out portion, and a branch wiring portion extending from the trunk wiring portion in a circumferential direction of the pellet substrate and electrically connected to the polysilicon gate electrode layer of each segment.

Abstract: The invention is for a paper insert device for a printer having a tractor cover for openably covering an opening before a tractor, a cut paper guide located above the tractor and behind an opening for manual insertion of a cut paper, and a manual insert cover for openably covering the opening. The manual insert cover is substantially flush with the cut paper guide when open.