Patents by Inventor Satoshi Yanaura
Satoshi Yanaura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10892203Abstract: Provided is a power semiconductor module including: a metal base plate; an insulating substrate arranged on the metal base plate and provided with an electrode; a semiconductor element arranged on the insulating substrate; a case arranged on the metal base plate so as to surround the insulating substrate and the semiconductor element; and a potting material filled into a space defined by the metal base plate and the case so as to encapsulate the insulating substrate and the semiconductor element. The potting material includes: a silicone gel; and a conductivity-imparting agent that is added to the gel and contains a silicon atom and an ionic group.Type: GrantFiled: November 15, 2017Date of Patent: January 12, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventor: Satoshi Yanaura
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Publication number: 20200091024Abstract: Provided is a power semiconductor module including: a metal base plate; an insulating substrate arranged on the metal base plate and provided with an electrode; a semiconductor element arranged on the insulating substrate; a case arranged on the metal base plate so as to surround the insulating substrate and the semiconductor element; and a potting material filled into a space defined by the metal base plate and the case so as to encapsulate the insulating substrate and the semiconductor element. The potting material includes: a silicone gel; and a conductivity-imparting agent that is added to the gel and contains a silicon atom and an ionic group.Type: ApplicationFiled: November 15, 2017Publication date: March 19, 2020Applicant: MITSUBISHI ELECTRIC CORPORATIONInventor: Satoshi YANAURA
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Patent number: 7100275Abstract: Method of producing a multi-layered wiring board comprising the steps of subjecting the photosensitive resin to exposure- and development-treatment to form the holes having a predetermined size and shape; depositing and forming the curable resin to the insulating layer having the holes formed therein in such a manner as to bury the holes, and conducting heat-treatment to form the cured thin film of the curable resin on the surface of the insulating layer; and so removing the curable resin as to leave the cured thin film to obtain the via-holes having the reduced opening size by the cured thin film.Type: GrantFiled: July 20, 2004Date of Patent: September 5, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toshiyuki Toyoshima, Satoshi Yanaura, Yasuo Furuhashi, Hirofumi Fujioka
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Publication number: 20050003076Abstract: Method of producing a multi-layered wiring board comprising the steps of subjecting the photosensitive resin to exposure- and development-treatment to form the holes having a predetermined size and shape; depositing and forming the curable resin to the insulating layer having the holes formed therein in such a manner as to bury the holes, and conducting heat-treatment to form the cured thin film of the curable resin on the surface of the insulating layer; and so removing the curable resin as to leave the cured thin film to obtain the via-holes having the reduced opening size by the cured thin film.Type: ApplicationFiled: July 20, 2004Publication date: January 6, 2005Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Toshiyuki Toyoshima, Satoshi Yanaura, Yasuo Furuhashi, Hirofumi Fujioka
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Patent number: 6700073Abstract: A silicone resin for sealing a semiconductor chip. A cured silicone resin, which is obtained by curing the silicone resin at a given temperature, has a percent elongation, after fracture, measured at a room temperature, not less than 4% of a penetration number at room temperature. A semiconductor device sealed with the silicone resin, when subjected to a heat cycle or a vibration test, provides resistance to cracking, forming of voids, and interfacial peeling-off. The cured silicone resin may have a penetration number not less than 10 and not more than 80 and a loss elasticity not less than 17% of the storage elasticity. A resin member made of the cured silicone resin and sealing a semiconductor chip may include a filler, such as silica or alumina, having a coefficient of linear thermal expansion lower than that of the cured silicone resin.Type: GrantFiled: October 4, 2001Date of Patent: March 2, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Seiki Hiramatsu, Satoshi Yanaura, Masuo Koga, Hirofumi Fujioka
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Patent number: 6664127Abstract: In a method of manufacturing multi-layer printed wiring board, an uncured resin sheet is laminated on both surfaces of a printed wiring board having one or more layers, an organic cover film having a release property is laminated on the surfaces of the uncured resin sheets on upper and lower sides of the printed wiring board, a position of the printed wiring board is irradiated with a laser beam from the surface of the organic cover film to form a non-through hole that reaches a metal land for electrically conducting the layers of the inner printed wiring board, the non-through hole is filled with a thermosetting electrically conducting paste which is then half-cured, and the organic cover film is peeled off.Type: GrantFiled: June 7, 2001Date of Patent: December 16, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Seiji Oka, Satoshi Yanaura, Yasuo Kawashima, Takeshi Muraki
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Patent number: 6451710Abstract: A method of manufacturing highly reliable and highly dense printed wiring board which is not warped even by the application of pressure and heat in manufacturing the multi-layer printed wiring board. The highly precise and highly dense multi-layer printed wiring board is realized by using an uncured resin sheet reinforced with fiber as an interlayer insulating layer, forming non-through holes in the uncured resin sheet using a laser beam, filling the non-through holes with a conductive paste, half-curing the conductive paste to form a wiring material, and sticking the wiring material onto the wiring substrate by application of pressure and heat, without causing a deviation in position even in applying pressure and heat.Type: GrantFiled: June 7, 2001Date of Patent: September 17, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Seiji Oka, Satoshi Yanaura, Yasuo Kawashima, Takeshi Muraki
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Publication number: 20020070439Abstract: A silicone resin for sealing a semiconductor chip is disclosed. A cured silicone resin, which is obtained by curing the silicone resin at a given temperature, has a number of percent elongation after fracture measured at a room temperature not less than 4% of a penetration number at a room temperature. A semiconductor device sealed with the silicone resin, when applied to a heat cycle or a vibration test, provides resistances to cracking, voiding, or interfacial peeling-off. The cured silicone resin may have a penetration number not less than 10 and not more than 80 and a loss elasticity not less than 17% of the storage elasticity. A resin member made of the cured silicone resin and sealing a semiconductor chip may include a filler, such as silica or alumina, of which coefficient of linear thermal expansion is lower than that of the cured silicone resin.Type: ApplicationFiled: October 4, 2001Publication date: June 13, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Seiki Hiramatsu, Satoshi Yanaura, Masuo Koga, Hirofumi Fujioka
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Publication number: 20020023343Abstract: A method of manufacturing highly reliable and highly densely printed wiring board which are not warped even by the application of pressure and heat in the step of manufacturing the multi-layer printed wiring board. The highly precise and highly dense multi-layer printed wiring board is realized by using an uncured resin sheet reinforced with fiber as an interlayer insulating layer, forming non-through holes in the uncured resin sheet by using a laser beam, filling the non-through holes with a conductive paste, half-curing the conductive paste to form a wiring material, and sticking the wiring material onto the wiring substrate by the application of pressure and heat, without causing deviation in position even in the step of applying pressure and heat.Type: ApplicationFiled: June 7, 2001Publication date: February 28, 2002Inventors: Seiji Oka, Satoshi Yanaura, Yasuo Kawashima, Takeshi Muraki
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Publication number: 20020016018Abstract: In a method of manufacturing multi-layer printed wiring board, an uncured resin sheet is laminated on both surfaces of a printed wiring board having one or more layers, an organic cover film having release property is laminated on the surfaces of the uncured resin sheets on the upper and lower sides of the inner printed wiring board, a desired position of the printed wiring board is irradiated with a laser beam from the surface of the organic cover film to form a non-through hole that reaches a metal land for electrically conducting the layers formed on the inner printed wiring board, the non-through hole is filled with a thermosetting electrically conducting paste which is then half-cured, and the organic cover film is peeled off.Type: ApplicationFiled: June 7, 2001Publication date: February 7, 2002Inventors: Seiji Oka, Satoshi Yanaura, Yasuo Kawashima, Takeshi Muraki
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Publication number: 20010025414Abstract: Method of producing a multi-layered wiring board comprising the steps of subjecting the photosensitive resin to exposure- and development-treatment to form the holes having a predetermined size and shape; depositing and forming the curable resin to the insulating layer having the holes formed therein in such a manner as to bury the holes, and conducting heat-treatment to form the cured thin film of the curable resin on the surface of the insulating layer; and so removing the curable resin as to leave the cured thin film to obtain the via-holes having the reduced opening size by the cured thin film.Type: ApplicationFiled: December 18, 2000Publication date: October 4, 2001Inventors: Toshiyuki Toyoshima, Satoshi Yanaura, Yasuo Furuhashi, Hirofumi Fujioka
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Patent number: 5276414Abstract: The improved moistureproof structure for a module circuit is characterized in that a porous film conditioned to have an apparent relative dielectric constant of no more than 2.0 is coated over a stripline a high-frequency circuit, or a high-frequency device formed on a substrate, which porous film may in turn be provided with a resin coating material. The structure insures that the module circuit is moistureproof, thereby protecting it against corrosion to improve its operational reliability without affecting its electrical characteristics.Type: GrantFiled: September 2, 1992Date of Patent: January 4, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takamitsu Fujimoto, Satoshi Yanaura, Atsuko Noda, Takeji Fujiwara, Hiroyuki Sato, Fumiaki Baba
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Patent number: 4985794Abstract: A head drive for a rotary drum device comprising a plurality of yokes made of magnetic material and magnets housed in the yokes for forming a plurality of magnetic fluxes. A bobbin, comprising a first material surrounds the magnets and has a coil formed on the bobbin. The coil is covered with a second material. At least one circular, non-magnetic leaf spring having an inner periphery and an outer periphery and supported at the outer periphery or the inner periphery by at least one of the yokes and the magnetic means supports the coil. Fixing members, comprising a third material are positioned at the inner periphery of the leaf spring. This third material is positively dissolved and welded to at least one of the first material and the second material with a bonding solvent whereby the leaf spring supports the coil. A prolongation at a portion of the outer periphery of the leaf spring can support a magnetic head.Type: GrantFiled: May 24, 1989Date of Patent: January 15, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Naoki Kato, Toshiro Tsukahara, Satoshi Yanaura, Kousuke Haraga