Patents by Inventor Satoshi Yokoo

Satoshi Yokoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11616458
    Abstract: A sensor-less detection circuit includes a first voltage adjustment circuit providing a first output voltage at a first node using one of three input voltages. A second voltage adjustment circuit provides a second output voltage at a second node using all three, or only two, of the three input voltages. The second voltage adjustment circuit acts as an internal virtual neutral point for detecting a zero crossing event of the motor. A differential amplifier is coupled with the first and second nodes and outputs a third output voltage at a third node. A reference buffer has a reference voltage input and provides a fourth output voltage at a fourth node. A comparator is coupled with the third and fourth nodes and outputs a fifth output voltage at a fifth node, the fifth voltage indicating a zero cross event.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: March 28, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Satoshi Yokoo
  • Publication number: 20220014130
    Abstract: A sensor-less detection circuit includes a first voltage adjustment circuit providing a first output voltage at a first node using one of three input voltages. A second voltage adjustment circuit provides a second output voltage at a second node using all three, or only two, of the three input voltages. The second voltage adjustment circuit acts as an internal virtual neutral point for detecting a zero crossing event of the motor. A differential amplifier is coupled with the first and second nodes and outputs a third output voltage at a third node. A reference buffer has a reference voltage input and provides a fourth output voltage at a fourth node. A comparator is coupled with the third and fourth nodes and outputs a fifth output voltage at a fifth node, the fifth voltage indicating a zero cross event.
    Type: Application
    Filed: September 27, 2021
    Publication date: January 13, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Satoshi YOKOO
  • Patent number: 11165374
    Abstract: A sensor-less detection circuit includes a first voltage adjustment circuit providing a first output voltage at a first node using one of three input voltages. A second voltage adjustment circuit provides a second output voltage at a second node using all three, or only two, of the three input voltages. The second voltage adjustment circuit acts as an internal virtual neutral point for detecting a zero crossing event of the motor. A differential amplifier is coupled with the first and second nodes and outputs a third output voltage at a third node. A reference buffer has a reference voltage input and provides a fourth output voltage at a fourth node. A comparator is coupled with the third and fourth nodes and outputs a fifth output voltage at a fifth node, the fifth voltage indicating a zero cross event.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: November 2, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Satoshi Yokoo
  • Publication number: 20210119560
    Abstract: A sensor-less detection circuit includes a first voltage adjustment circuit providing a first output voltage at a first node using one of three input voltages. A second voltage adjustment circuit provides a second output voltage at a second node using all three, or only two, of the three input voltages. The second voltage adjustment circuit acts as an internal virtual neutral point for detecting a zero crossing event of the motor. A differential amplifier is coupled with the first and second nodes and outputs a third output voltage at a third node. A reference buffer has a reference voltage input and provides a fourth output voltage at a fourth node. A comparator is coupled with the third and fourth nodes and outputs a fifth output voltage at a fifth node, the fifth voltage indicating a zero cross event.
    Type: Application
    Filed: April 1, 2020
    Publication date: April 22, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Satoshi YOKOO
  • Patent number: 10432118
    Abstract: A motor control system, in some embodiments, comprises: a voltage divider circuit having an output node, a voltage on said output node representing a desired motor rotation direction; control logic configured to receive an indication of said voltage; and a motor controller coupled to the control logic, wherein, if said indication of the voltage on the output node falls outside of a predetermined range, the control logic is configured to issue a motor stop signal to the motor controller indicating that at least one resistor of the voltage divider circuit is defective or is missing from the voltage divider circuit.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: October 1, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Takashi Ogawa, Fumio Kumazawa, Satoshi Yokoo, Juichi Uno
  • Publication number: 20190074783
    Abstract: A motor control system, in some embodiments, comprises: a voltage divider circuit having an output node, a voltage on said output node representing a desired motor rotation direction; control logic configured to receive an indication of said voltage; and a motor controller coupled to the control logic, wherein, if said indication of the voltage on the output node falls outside of a predetermined range, the control logic is configured to issue a motor stop signal to the motor controller indicating that at least one resistor of the voltage divider circuit is defective or is missing from the voltage divider circuit.
    Type: Application
    Filed: November 8, 2018
    Publication date: March 7, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Takashi OGAWA, Fumio KUMAZAWA, Satoshi YOKOO, Juichi UNO
  • Patent number: 10158308
    Abstract: A motor control system, in some embodiments, comprises: a voltage divider circuit having an output node, a voltage on said output node representing a desired motor rotation direction; control logic configured to receive an indication of said voltage; and a motor controller coupled to the control logic, wherein, if said indication of the voltage on the output node falls outside of a predetermined range, the control logic is configured to issue a motor stop signal to the motor controller indicating that at least one resistor of the voltage divider circuit is defective or is missing from the voltage divider circuit.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: December 18, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Takashi Ogawa, Fumio Kumazawa, Satoshi Yokoo, Juichi Uno
  • Patent number: 10009015
    Abstract: In accordance with an embodiment, an automatic zeroing circuit is provided that includes an automatic zeroing circuit, comprising a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A comparator having an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for automatically zeroing a detection circuit includes receiving a first back electromotive force at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. A comparator circuit is calibrated and the first back electromotive force is detected.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: June 26, 2018
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Satoshi Yokoo, Atsuhiro Ichikawa
  • Patent number: 9912268
    Abstract: In accordance with an embodiment, a sensor-less detection circuit is provided that includes a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A differential amplifier has an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for detecting a motor rotor position is provided that includes receiving a first back electromotive force that is at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. The first back electromotive force is filtered to generate a first filtered voltage; and a first motor rotor position signal is generated in response to comparing the first filtered voltage with a reference voltage.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: March 6, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Satoshi Yokoo, Atsuhiro Ichikawa
  • Publication number: 20170366122
    Abstract: A motor control system, in some embodiments, comprises: a voltage divider circuit having an output node, a voltage on said output node representing a desired motor rotation direction; control logic configured to receive an indication of said voltage; and a motor controller coupled to the control logic, wherein, if said indication of the voltage on the output node falls outside of a predetermined range, the control logic is configured to issue a motor stop signal to the motor controller indicating that at least one resistor of the voltage divider circuit is defective or is missing from the voltage divider circuit.
    Type: Application
    Filed: June 17, 2016
    Publication date: December 21, 2017
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Takashi OGAWA, Fumio KUMAZAWA, Satoshi YOKOO, Juichi UNO
  • Patent number: 9793841
    Abstract: In accordance with an embodiment, a sensor-less detection circuit is provided that includes a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A differential amplifier has an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for detecting a motor rotor position is provided that includes receiving a first back electromotive force that is at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. The first back electromotive force is filtered to generate a first filtered voltage; and a first motor rotor position signal is generated in response to comparing the first filtered voltage with a reference voltage.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: October 17, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Satoshi Yokoo, Atsuhiro Ichikawa
  • Publication number: 20160320207
    Abstract: In accordance with an embodiment, a sensor-less detection circuit is provided that includes a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A differential amplifier has an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for detecting a motor rotor position is provided that includes receiving a first back electromotive force that is at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. The first back electromotive force is filtered to generate a first filtered voltage; and a first motor rotor position signal is generated in response to comparing the first filtered voltage with a reference voltage.
    Type: Application
    Filed: August 28, 2015
    Publication date: November 3, 2016
    Applicant: Semiconductor Components Industries, LLC
    Inventors: Satoshi Yokoo, Atsuhiro Ichikawa
  • Publication number: 20160320208
    Abstract: In accordance with an embodiment, a sensor-less detection circuit is provided that includes a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A differential amplifier has an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for detecting a motor rotor position is provided that includes receiving a first back electromotive force that is at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. The first back electromotive force is filtered to generate a first filtered voltage; and a first motor rotor position signal is generated in response to comparing the first filtered voltage with a reference voltage.
    Type: Application
    Filed: August 28, 2015
    Publication date: November 3, 2016
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Satoshi Yokoo, Atsuhiro Ichikawa
  • Publication number: 20160322963
    Abstract: In accordance with an embodiment, an automatic zeroing circuit is provided that includes an automatic zeroing circuit, comprising a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A comparator having an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for automatically zeroing a detection circuit includes receiving a first back electromotive force at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. A comparator circuit is calibrated and the first back electromotive force is detected.
    Type: Application
    Filed: August 28, 2015
    Publication date: November 3, 2016
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Satoshi Yokoo, Atsuhiro Ichikawa
  • Patent number: 8656232
    Abstract: An apparatus for testing a semiconductor integrated circuit includes a pattern data generating unit configured to generate test pattern data for testing a write operation in a memory of the semiconductor integrated circuit; and a write unit configured to write the test pattern data into a storage area of the semiconductor integrated circuit.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: February 18, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Yusuke Tanefusa, Kenichi Gomi, Satoshi Yokoo
  • Patent number: 8134602
    Abstract: In a first operational amplifier, an input signal is input to the negative input terminal, a reference voltage is input to the positive input terminal, a feedback path from the output terminal to the negative input terminal is formed, and the input signal is amplified by a predetermined amplification factor. In a second operational amplifier, an output from the first operational amplifier is input to the positive input terminal, the reference voltage is input to the negative input terminal, and a pair of outputs having opposite polarities to each other and used for performing BTL drive of a load are obtained at the output terminal. Using the above arrangement, a low-frequency signal can be amplified.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: March 13, 2012
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventor: Satoshi Yokoo
  • Publication number: 20110219276
    Abstract: An apparatus for testing a semiconductor integrated circuit includes a pattern data generating unit configured to generate test pattern data for testing a write operation in a memory of the semiconductor integrated circuit; and a write unit configured to write the test pattern data into a storage area of the semiconductor integrated circuit.
    Type: Application
    Filed: February 2, 2011
    Publication date: September 8, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Yusuke TANEFUSA, Kenichi GOMI, Satoshi YOKOO
  • Patent number: 7928771
    Abstract: Input signals from a signal input terminal are input to a logic circuit, and a control signal corresponding to states of the input signals is output. The control signal is supplied to an output circuit, a plurality of transistors are controlled, and a drive signal is output corresponding to states of the transistors. In the logic circuit, the logic is switched according to the polarity of the setting signal which is input to a logic setting terminal, and a control signal corresponding to the input signal is changed.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: April 19, 2011
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventor: Satoshi Yokoo
  • Patent number: 7893757
    Abstract: An efficient logic chip operating power supply having digital circuits in a multi-chip package is provided. A multi-chip package semiconductor device fabricated in common with a driver chip having analog circuits and a logic chip having digital circuits, a logic chip power supply circuit is provided in which a driver chip creates a logic chip power supply dedicated for the logic chip. The logic chip has internal logic circuitry operating by receiving a power supply from the logic chip power supply circuit via power input terminals.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: February 22, 2011
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventors: Tomofumi Watanabe, Satoshi Noro, Satoshi Yokoo
  • Patent number: 7737758
    Abstract: An amplifier including the transistors of a first set operates by a power source VCC2, and amplifies the input signal, changing in the voltage range of the power source VCC2, in the voltage range of the power source VCC2. The output of this amplifier operates using a power source VCC1 with a converting portion including the transistors of a second set, and the output of the amplifier is converted into an output within the voltage range of the power source VCC1. The two output amplifiers amplify the output of this converting portion based on a (½) VCC1 reference. The converting portion performs the conversion using a plurality of transistors with the power source VCC2 taken as a power source and a plurality of transistors 7 with the power source VCC1 taken as a power source, as current mirrors.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: June 15, 2010
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventor: Satoshi Yokoo