Patents by Inventor Satoshi Yokoo
Satoshi Yokoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11616458Abstract: A sensor-less detection circuit includes a first voltage adjustment circuit providing a first output voltage at a first node using one of three input voltages. A second voltage adjustment circuit provides a second output voltage at a second node using all three, or only two, of the three input voltages. The second voltage adjustment circuit acts as an internal virtual neutral point for detecting a zero crossing event of the motor. A differential amplifier is coupled with the first and second nodes and outputs a third output voltage at a third node. A reference buffer has a reference voltage input and provides a fourth output voltage at a fourth node. A comparator is coupled with the third and fourth nodes and outputs a fifth output voltage at a fifth node, the fifth voltage indicating a zero cross event.Type: GrantFiled: September 27, 2021Date of Patent: March 28, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Satoshi Yokoo
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Publication number: 20220014130Abstract: A sensor-less detection circuit includes a first voltage adjustment circuit providing a first output voltage at a first node using one of three input voltages. A second voltage adjustment circuit provides a second output voltage at a second node using all three, or only two, of the three input voltages. The second voltage adjustment circuit acts as an internal virtual neutral point for detecting a zero crossing event of the motor. A differential amplifier is coupled with the first and second nodes and outputs a third output voltage at a third node. A reference buffer has a reference voltage input and provides a fourth output voltage at a fourth node. A comparator is coupled with the third and fourth nodes and outputs a fifth output voltage at a fifth node, the fifth voltage indicating a zero cross event.Type: ApplicationFiled: September 27, 2021Publication date: January 13, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Satoshi YOKOO
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Patent number: 11165374Abstract: A sensor-less detection circuit includes a first voltage adjustment circuit providing a first output voltage at a first node using one of three input voltages. A second voltage adjustment circuit provides a second output voltage at a second node using all three, or only two, of the three input voltages. The second voltage adjustment circuit acts as an internal virtual neutral point for detecting a zero crossing event of the motor. A differential amplifier is coupled with the first and second nodes and outputs a third output voltage at a third node. A reference buffer has a reference voltage input and provides a fourth output voltage at a fourth node. A comparator is coupled with the third and fourth nodes and outputs a fifth output voltage at a fifth node, the fifth voltage indicating a zero cross event.Type: GrantFiled: April 1, 2020Date of Patent: November 2, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Satoshi Yokoo
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Publication number: 20210119560Abstract: A sensor-less detection circuit includes a first voltage adjustment circuit providing a first output voltage at a first node using one of three input voltages. A second voltage adjustment circuit provides a second output voltage at a second node using all three, or only two, of the three input voltages. The second voltage adjustment circuit acts as an internal virtual neutral point for detecting a zero crossing event of the motor. A differential amplifier is coupled with the first and second nodes and outputs a third output voltage at a third node. A reference buffer has a reference voltage input and provides a fourth output voltage at a fourth node. A comparator is coupled with the third and fourth nodes and outputs a fifth output voltage at a fifth node, the fifth voltage indicating a zero cross event.Type: ApplicationFiled: April 1, 2020Publication date: April 22, 2021Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Satoshi YOKOO
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Patent number: 10432118Abstract: A motor control system, in some embodiments, comprises: a voltage divider circuit having an output node, a voltage on said output node representing a desired motor rotation direction; control logic configured to receive an indication of said voltage; and a motor controller coupled to the control logic, wherein, if said indication of the voltage on the output node falls outside of a predetermined range, the control logic is configured to issue a motor stop signal to the motor controller indicating that at least one resistor of the voltage divider circuit is defective or is missing from the voltage divider circuit.Type: GrantFiled: November 8, 2018Date of Patent: October 1, 2019Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Takashi Ogawa, Fumio Kumazawa, Satoshi Yokoo, Juichi Uno
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Publication number: 20190074783Abstract: A motor control system, in some embodiments, comprises: a voltage divider circuit having an output node, a voltage on said output node representing a desired motor rotation direction; control logic configured to receive an indication of said voltage; and a motor controller coupled to the control logic, wherein, if said indication of the voltage on the output node falls outside of a predetermined range, the control logic is configured to issue a motor stop signal to the motor controller indicating that at least one resistor of the voltage divider circuit is defective or is missing from the voltage divider circuit.Type: ApplicationFiled: November 8, 2018Publication date: March 7, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Takashi OGAWA, Fumio KUMAZAWA, Satoshi YOKOO, Juichi UNO
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Patent number: 10158308Abstract: A motor control system, in some embodiments, comprises: a voltage divider circuit having an output node, a voltage on said output node representing a desired motor rotation direction; control logic configured to receive an indication of said voltage; and a motor controller coupled to the control logic, wherein, if said indication of the voltage on the output node falls outside of a predetermined range, the control logic is configured to issue a motor stop signal to the motor controller indicating that at least one resistor of the voltage divider circuit is defective or is missing from the voltage divider circuit.Type: GrantFiled: June 17, 2016Date of Patent: December 18, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Takashi Ogawa, Fumio Kumazawa, Satoshi Yokoo, Juichi Uno
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Patent number: 10009015Abstract: In accordance with an embodiment, an automatic zeroing circuit is provided that includes an automatic zeroing circuit, comprising a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A comparator having an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for automatically zeroing a detection circuit includes receiving a first back electromotive force at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. A comparator circuit is calibrated and the first back electromotive force is detected.Type: GrantFiled: August 28, 2015Date of Patent: June 26, 2018Assignee: Semiconductor Components Industries, LLCInventors: Satoshi Yokoo, Atsuhiro Ichikawa
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Patent number: 9912268Abstract: In accordance with an embodiment, a sensor-less detection circuit is provided that includes a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A differential amplifier has an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for detecting a motor rotor position is provided that includes receiving a first back electromotive force that is at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. The first back electromotive force is filtered to generate a first filtered voltage; and a first motor rotor position signal is generated in response to comparing the first filtered voltage with a reference voltage.Type: GrantFiled: August 28, 2015Date of Patent: March 6, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Satoshi Yokoo, Atsuhiro Ichikawa
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Publication number: 20170366122Abstract: A motor control system, in some embodiments, comprises: a voltage divider circuit having an output node, a voltage on said output node representing a desired motor rotation direction; control logic configured to receive an indication of said voltage; and a motor controller coupled to the control logic, wherein, if said indication of the voltage on the output node falls outside of a predetermined range, the control logic is configured to issue a motor stop signal to the motor controller indicating that at least one resistor of the voltage divider circuit is defective or is missing from the voltage divider circuit.Type: ApplicationFiled: June 17, 2016Publication date: December 21, 2017Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Takashi OGAWA, Fumio KUMAZAWA, Satoshi YOKOO, Juichi UNO
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Patent number: 9793841Abstract: In accordance with an embodiment, a sensor-less detection circuit is provided that includes a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A differential amplifier has an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for detecting a motor rotor position is provided that includes receiving a first back electromotive force that is at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. The first back electromotive force is filtered to generate a first filtered voltage; and a first motor rotor position signal is generated in response to comparing the first filtered voltage with a reference voltage.Type: GrantFiled: August 28, 2015Date of Patent: October 17, 2017Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Satoshi Yokoo, Atsuhiro Ichikawa
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Publication number: 20160320207Abstract: In accordance with an embodiment, a sensor-less detection circuit is provided that includes a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A differential amplifier has an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for detecting a motor rotor position is provided that includes receiving a first back electromotive force that is at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. The first back electromotive force is filtered to generate a first filtered voltage; and a first motor rotor position signal is generated in response to comparing the first filtered voltage with a reference voltage.Type: ApplicationFiled: August 28, 2015Publication date: November 3, 2016Applicant: Semiconductor Components Industries, LLCInventors: Satoshi Yokoo, Atsuhiro Ichikawa
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Publication number: 20160320208Abstract: In accordance with an embodiment, a sensor-less detection circuit is provided that includes a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A differential amplifier has an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for detecting a motor rotor position is provided that includes receiving a first back electromotive force that is at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. The first back electromotive force is filtered to generate a first filtered voltage; and a first motor rotor position signal is generated in response to comparing the first filtered voltage with a reference voltage.Type: ApplicationFiled: August 28, 2015Publication date: November 3, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Satoshi Yokoo, Atsuhiro Ichikawa
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Publication number: 20160322963Abstract: In accordance with an embodiment, an automatic zeroing circuit is provided that includes an automatic zeroing circuit, comprising a first voltage adjustment circuit coupled for receiving an induced voltage and a second voltage adjustment circuit coupled for receiving a common voltage. A comparator having an inverting input terminal coupled to the first voltage adjustment circuit and a noninverting input terminal coupled to the second voltage adjustment circuit. In accordance with another embodiment, a method for automatically zeroing a detection circuit includes receiving a first back electromotive force at a first voltage level and shifting the first back electromotive force from the first voltage level to a second voltage level. A comparator circuit is calibrated and the first back electromotive force is detected.Type: ApplicationFiled: August 28, 2015Publication date: November 3, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Satoshi Yokoo, Atsuhiro Ichikawa
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Patent number: 8656232Abstract: An apparatus for testing a semiconductor integrated circuit includes a pattern data generating unit configured to generate test pattern data for testing a write operation in a memory of the semiconductor integrated circuit; and a write unit configured to write the test pattern data into a storage area of the semiconductor integrated circuit.Type: GrantFiled: February 2, 2011Date of Patent: February 18, 2014Assignee: Fujitsu Semiconductor LimitedInventors: Yusuke Tanefusa, Kenichi Gomi, Satoshi Yokoo
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Patent number: 8134602Abstract: In a first operational amplifier, an input signal is input to the negative input terminal, a reference voltage is input to the positive input terminal, a feedback path from the output terminal to the negative input terminal is formed, and the input signal is amplified by a predetermined amplification factor. In a second operational amplifier, an output from the first operational amplifier is input to the positive input terminal, the reference voltage is input to the negative input terminal, and a pair of outputs having opposite polarities to each other and used for performing BTL drive of a load are obtained at the output terminal. Using the above arrangement, a low-frequency signal can be amplified.Type: GrantFiled: December 22, 2008Date of Patent: March 13, 2012Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventor: Satoshi Yokoo
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Publication number: 20110219276Abstract: An apparatus for testing a semiconductor integrated circuit includes a pattern data generating unit configured to generate test pattern data for testing a write operation in a memory of the semiconductor integrated circuit; and a write unit configured to write the test pattern data into a storage area of the semiconductor integrated circuit.Type: ApplicationFiled: February 2, 2011Publication date: September 8, 2011Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Yusuke TANEFUSA, Kenichi GOMI, Satoshi YOKOO
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Patent number: 7928771Abstract: Input signals from a signal input terminal are input to a logic circuit, and a control signal corresponding to states of the input signals is output. The control signal is supplied to an output circuit, a plurality of transistors are controlled, and a drive signal is output corresponding to states of the transistors. In the logic circuit, the logic is switched according to the polarity of the setting signal which is input to a logic setting terminal, and a control signal corresponding to the input signal is changed.Type: GrantFiled: July 9, 2009Date of Patent: April 19, 2011Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventor: Satoshi Yokoo
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Patent number: 7893757Abstract: An efficient logic chip operating power supply having digital circuits in a multi-chip package is provided. A multi-chip package semiconductor device fabricated in common with a driver chip having analog circuits and a logic chip having digital circuits, a logic chip power supply circuit is provided in which a driver chip creates a logic chip power supply dedicated for the logic chip. The logic chip has internal logic circuitry operating by receiving a power supply from the logic chip power supply circuit via power input terminals.Type: GrantFiled: November 26, 2007Date of Patent: February 22, 2011Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Tomofumi Watanabe, Satoshi Noro, Satoshi Yokoo
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Patent number: 7737758Abstract: An amplifier including the transistors of a first set operates by a power source VCC2, and amplifies the input signal, changing in the voltage range of the power source VCC2, in the voltage range of the power source VCC2. The output of this amplifier operates using a power source VCC1 with a converting portion including the transistors of a second set, and the output of the amplifier is converted into an output within the voltage range of the power source VCC1. The two output amplifiers amplify the output of this converting portion based on a (½) VCC1 reference. The converting portion performs the conversion using a plurality of transistors with the power source VCC2 taken as a power source and a plurality of transistors 7 with the power source VCC1 taken as a power source, as current mirrors.Type: GrantFiled: December 22, 2008Date of Patent: June 15, 2010Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventor: Satoshi Yokoo