Patents by Inventor Satsuki FUJII

Satsuki FUJII has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Ceramic electronic component, method of producing the same, and circuit board
    Patent number: 11482381
    Abstract: A ceramic electronic component includes: a ceramic body including a pair of end surfaces, and a side surface connecting the pair of end surfaces and including a pair of end regions adjacent to the pair of end surfaces and an intermediate region located between the pair of end regions; and a pair of external electrodes including a pair of base layers that cover the pair of end surfaces and the pair of end regions of the side surface and include outer surfaces, a difference of a surface roughness Ra of the outer surfaces with respect to the intermediate region of the side surface being 40 nm or less, and a pair of plating layers covering the outer surfaces of the pair of base layers and including a pair of extending portions extending from the outer surfaces of the pair of base layers to the intermediate region of the side surface.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: October 25, 2022
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Ryosuke Hoshino, Satoshi Kobayashi, Yasuaki Uchida, Satsuki Fujii
  • CERAMIC ELECTRONIC COMPONENT, METHOD OF PRODUCING THE SAME, AND CIRCUIT BOARD
    Publication number: 20210304967
    Abstract: A ceramic electronic component includes: a ceramic body including a pair of end surfaces, and a side surface connecting the pair of end surfaces and including a pair of end regions adjacent to the pair of end surfaces and an intermediate region located between the pair of end regions; and a pair of external electrodes including a pair of base layers that cover the pair of end surfaces and the pair of end regions of the side surface and include outer surfaces, a difference of a surface roughness Ra of the outer surfaces with respect to the intermediate region of the side surface being 40 nm or less, and a pair of plating layers covering the outer surfaces of the pair of base layers and including a pair of extending portions extending from the outer surfaces of the pair of base layers to the intermediate region of the side surface.
    Type: Application
    Filed: March 5, 2021
    Publication date: September 30, 2021
    Inventors: Ryosuke HOSHINO, Satoshi KOBAYASHI, Yasuaki UCHIDA, Satsuki FUJII