Patents by Inventor Satyam C. Cherukuri
Satyam C. Cherukuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6231177Abstract: A final print medium for receiving fluid to form an image has a plurality of target regions formed for receiving the fluid, wherein the target regions are separated by hydrophobic regions. The target regions and the hydrophobic regions are configured to receive the fluid from corresponding nozzles of a print array.Type: GrantFiled: September 24, 1998Date of Patent: May 15, 2001Assignee: Sarnoff CorporationInventors: Satyam C. Cherukuri, Judith Ann Ladd, Sterling E. McBride, Pamela K. York
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Patent number: 6154226Abstract: A print array that incorporates reservoir(s), microchannels and electrohydrodynamic (EHD) pumps for selectively dispensing fluid (ink) from the reservoir(s) onto the surface of a receptor.Type: GrantFiled: September 29, 1997Date of Patent: November 28, 2000Assignee: Sarnoff CorporationInventors: Pamela K. York, Sterling E. McBride, Satyam C. Cherukuri
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Patent number: 5980719Abstract: An electrohydrodynamic (EHD) receptor that incorporates microchannels and reservoir(s) for selectively dispensing fluid from the reservoir(s) to a specific location, e.g., onto the surface of the receptor.Type: GrantFiled: September 29, 1997Date of Patent: November 9, 1999Assignee: Sarnoff CorporationInventors: Satyam C. Cherukuri, Aaron W. Levine, Sterling E. McBride, Pamela K. York
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Patent number: 5880705Abstract: An electroluminescent display formed on a ceramic substrate having a front ceramic surface and a back ceramic surface. The ceramic substrate includes a metal core that provides structural support, electrical ground, and heat dissipation. Electroluminescent cells are mounted on the front ceramic surface and driver circuits for driving the of electroluminescent cells are mounted on the back ceramic surface. The driver circuits are positioned directly behind said electroluminescent cells. Connectors extend through said ceramic substrate and the electroluminescent cells to different driver circuits. By positioning the driver circuits close to the EL cells, the drive lines from the drivers to the EL cells are short which allows for high refresh rates and low resistance losses. Each of the driver circuits can drive one electroluminescent cell or a group of electroluminescent cells. EL display cells coupled to a cermet electrode can also be driven by a field emission device or a low power electron beam.Type: GrantFiled: March 7, 1997Date of Patent: March 9, 1999Assignee: Sarnoff CorporationInventors: Lubomyr Stephen Onyskevych, Satyam C. Cherukuri, Ashok Narayan Prabhu, P. Neil Yoc.o slashed.m, Kenneth E. Salsman
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Patent number: 5644327Abstract: An electroluminescent display formed on a ceramic substrate having a front ceramic surface and a back ceramic surface. The ceramic substrate includes a metal core that provides structural support, electrical ground, and heat dissipation. Electroluminescent cells are mounted on the front ceramic surface and driver circuits for driving the of electroluminescent cells are mounted on the back ceramic surface. The driver circuits are positioned directly behind said electroluminescent cells. Connectors extend through said ceramic substrate and the electroluminescent cells to different driver circuits. By positioning the driver circuits close to the EL cells, the drive lines from the drivers to the EL cells are short which allows for high refresh rates and low resistance losses. Each of the driver circuits can drive one electroluminescent cell or a group of electroluminescent cells. EL display cells coupled to a cermet electrode can also be driven by a field emission device or a low power electron beam.Type: GrantFiled: June 7, 1995Date of Patent: July 1, 1997Assignee: David Sarnoff Research Center, Inc.Inventors: Lubomyr Stephen Onyskevych, Satyam C. Cherukuri, Ashok Narayan Prabhu, P. Niel Yocom, Kenneth E. Salsman
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Patent number: 5632876Abstract: By combining electro-osmotic and electrohydrodynamic pumps in a microchannel, both polar and non-polar fluids can be moved along said channel. The pumps can be made from pairs of wire electrodes inserted into openings in the channel and connected to a source of a pulsed DC power. By reversing the voltages on alternate pairs of pumps, fluid flow can be reversed, thereby acting as a gate or valve. By using digital drivers, for example shift registers that can apply a signal to a switching device connected to an electrode by means of enabling and latch signals to an AND gate, control of flow in individual channels in an array of channels can be had with a high degree of integration, and provide for ready manufacturability.Type: GrantFiled: June 6, 1995Date of Patent: May 27, 1997Assignee: David Sarnoff Research Center, Inc.Inventors: Peter J. Zanzucchi, Sterling E. McBride, Charlotte A. Burton, Satyam C. Cherukuri
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Patent number: 5603351Abstract: A system and method for accomplishing a plurality of combinatorial processes in parallel comprising a microelectronic and fluidic array (device array) having micron-sized reservoirs, connecting microchannels and reaction cells etched into a substrate. The device array is supported by a station which serves to interface and perform electro-optic measurements of material in the reaction cells of the device array. The device array incorporates a modular configuration with three distinct layers or plates. The device array comprises a top feedthru plate, a center distribution plate and a bottom cell plate. The three plates are stacked vertically and coupled together to form a liquid-tight seal. Reservoirs, microchannels and reactions cells are controllably etched onto the plates using traditional semiconductor fabrication techniques. The top feedthru plate serves as a cover for the device array and contains apertures selectively positioned above the reservoirs located in the center distribution plate.Type: GrantFiled: June 7, 1995Date of Patent: February 18, 1997Assignee: David Sarnoff Research Center, Inc.Inventors: Satyam C. Cherukuri, Robert R. Demers, Zhong H. Fan, Aaron W. Levine, Sterling E. McBride, Peter J. Zanzucchi
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Patent number: 5593838Abstract: A system for processing a plurality of tests or syntheses in parallel comprising a sample channel for moving samples into a microlaboratory array of a plurality of wells connected by one or more channels for the testing or synthesis of samples, a station for housing the array and an optical system comprising at least one light source and at least one light detector for measuring the samples in the array, and a means of electrically connecting said array to an apparatus capable of monitoring and controlling the flow of fluids into the array. Samples are loaded from a common loading channel into the array, processed in the wells and measurements taken by the optical system. The array can process many samples, or synthesize many compounds in parallel, reducing the time required for such processes.Type: GrantFiled: May 31, 1995Date of Patent: January 14, 1997Assignee: David Sarnoff Research Center, Inc.Inventors: Peter J. Zanzucchi, Satyam C. Cherukuri, Sterling E. McBride, Amrit K. Judd
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Partitioned microelectronic and fluidic device array for clinical diagnostics and chemical synthesis
Patent number: 5585069Abstract: A system for processing a plurality of tests or syntheses in parallel comprising a sample channel for moving samples into a microlaboratory array of a plurality of wells connected by one or more channels for the testing or synthesis of samples, a station for housing the array and an optical system comprising at least one light source and at least one light detector for measuring the samples in the array, and a means of electrically connecting the array to an apparatus capable of monitoring and controlling the flow of fluids into the array.Samples are loaded from a common loading channel into the array, processed in the wells and measurements taken by the optical system. The array can process many samples, or synthesize many compounds in parallel, reducing the time required for such processes.Type: GrantFiled: November 10, 1994Date of Patent: December 17, 1996Assignee: David Sarnoff Research Center, Inc.Inventors: Peter J. Zanzucchi, Satyam C. Cherukuri, Sterling E. McBride -
Patent number: 5047371Abstract: The present invention relates to a glass/ceramic sealing system. A sealing glass having a coefficient of thermal expansion in excess of 160.times.10.sup.-7 in/in/.degree. C. is provided. The glass is useful for matched sealing of copper and copper based alloys. The glass is capable of ceramization, greatly increasing the resistance of the glass to moisture penetration and fracture due to mechanical damage. The temperature of ceramization has been designed so that a solutionized copper alloy leadframe is age hardened during ceramization. The glass has particular utility in the manufacture of electronic packages and multi-layer circuitry.Type: GrantFiled: September 2, 1988Date of Patent: September 10, 1991Assignee: Olin CorporationInventor: Satyam C. Cherukuri
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Patent number: 5043222Abstract: The present invention relates to a glass for making glass to metal seals. The coefficient of thermal expansion of the glass is in excess of 160.times.10.sup.-7 in/in/.degree.C. making the glass particularly useful for sealing copper and copper based alloys. The glass has particular utility in the manufacture of electronic packages and multi-layer circuitry.Type: GrantFiled: April 23, 1990Date of Patent: August 27, 1991Assignee: Olin CorporationInventor: Satyam C. Cherukuri
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Patent number: 4978052Abstract: A semiconductor die attach system adapted for attaching a semiconductor die to a substrate is provided. A metallic buffer component is disposed between the substrate and the semiconductor die to withstand stresses created from thermal cycling of the substrate and the die. The metallic buffer component is sealed to the substrate with a layer of solder. The layer of solder is provided to dissipate stresses created by thermal cycling of the substrate and the die. The die is sealed to the buffer with a silver-glass adhesive.Type: GrantFiled: August 28, 1989Date of Patent: December 18, 1990Assignee: Olin CorporationInventors: Julius C. Fister, Satyam C. Cherukuri, Deepak Mahulikar, Brian E. O'Donnelly
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Patent number: 4952531Abstract: The present invention relates to a glass for making glass to metal seals. The coefficient of thermal expansion of the glass is in excess of 160.times.10.sup.-7 in/in/.degree.C. making the glass particularly useful for sealing copper and copper based alloys. The glass has particular utility in the manufacture of electronic packages and multi-layer circuitry.Type: GrantFiled: March 17, 1988Date of Patent: August 28, 1990Assignee: Olin CorporationInventor: Satyam C. Cherukuri
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Patent number: 4929516Abstract: A semiconductor die attach system adapted for attaching a semiconductor die to a substrate is provided. A metallic buffer component for dissipating thermal stresses is disposed between the substrate and the semiconductor die to dissipate stresses created from thermal cycling of the substrate and the die. The metallic buffer component is sealed between the substrate and the die with a silver-tin sealing composition. A bonding material may be used alone to bond a die to a substrate and dissipate stresses from thermal cycling.Type: GrantFiled: February 10, 1986Date of Patent: May 29, 1990Assignee: Olin CorporationInventors: Michael J. Pryor, Julius C. Fister, Narendra N. Singhdeo, Deepak Mahulikar, Satyam C. Cherukuri
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Patent number: 4872047Abstract: A semiconductor die attach system adapted for attaching a semiconductor die to a substrate is provided. A metallic buffer component is disposed between the substrate and the semiconductor die to withstand stresses created from thermal cycling of the substrate and the die. The metallic buffer component is sealed to the substrate with a layer of solder. The layer of solder is provided to dissipate stresses created by thermal cycling of the substrate and the die. The die is sealed to the buffer with a silver-glass adhesive.Type: GrantFiled: November 7, 1986Date of Patent: October 3, 1989Assignee: Olin CorporationInventors: Julius C. Fister, Satyam C. Cherukuri, Deepak Mahulikar, Brian E. O'Donnelly
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Patent number: 4796083Abstract: A hermetic semiconductor casing for an electrical component has a metal or metal alloy leadframe with first and second opposite surfaces each having a first refractory oxide layer thereon, which leadframe is adapted to have the electrical component connected thereto. The leadframe is bonded by means of a fired glass or ceramic to a metal or metal alloy base member. The base member has a relatively thin metal or metal alloy coating on at least the top surface and the sides thereof, with the coating having a desirable refractory oxide layer on the outer surface thereof. The leadframe is also bonded by means of a fired glass or ceramic to a metal or metal alloy cap member having a refractory oxide layer on the lower surface thereof. The coating on the base member allows use of a base member that has undesirable oxide forming characteristics.Type: GrantFiled: July 2, 1987Date of Patent: January 3, 1989Assignee: Olin CorporationInventors: Satyam C. Cherukuri, Sheldon H. Butt
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Patent number: 4769345Abstract: The present invention is directed to a process of forming a package for enclosing an electrical device wherein the enclosure contains a very low amount of oxygen and water vapor. The package includes a base and lid components bonded together by a sealing glass. The lid component contains a gettering alloy from which the oxide layer is removed prior to the final sealing of the package. The gettering alloy forms a refractory oxide layer under an oxide layer formed with the primary constituent of the alloy.Type: GrantFiled: March 12, 1987Date of Patent: September 6, 1988Assignee: Olin CorporationInventors: Sheldon H. Butt, Satyam C. Cherukuri
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Patent number: 4704626Abstract: A graded seal assembly adapted for hermetically sealing a semiconductor package is disclosed. First and second members having first and second coefficients of thermal expansion respectively are provided. A leadframe is disposed between the first and second members. A first sealing glass is bonded to opposite surfaces of the leadframe and is disposed between the leadframe and the first member for sealing the leadframe to the first member. The second sealing glass is bonded to the second member. The second sealing glass has a third CTE which has a mismatch of less than about 5.times.10.sup.-7 in/in/.degree.C. with said second member. A graded interface zone having stratified layers fuses the first and second sealing glasses. Each of the layers in the zone has a coefficient of thermal expansion which is mismatched less than about 5.times.10.sup.-7 in/in/.degree.C. with an adjacent layer to absorb thermal stress formed by exposure of the semiconductor package to thermal cycling.Type: GrantFiled: July 8, 1985Date of Patent: November 3, 1987Assignee: Olin CorporationInventors: Deepak Mahulikar, Satyam C. Cherukuri