Patents by Inventor Satyamoorthi Chinnusamy
Satyamoorthi Chinnusamy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230275065Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.Type: ApplicationFiled: May 9, 2023Publication date: August 31, 2023Applicant: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
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Patent number: 11699678Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.Type: GrantFiled: November 5, 2020Date of Patent: July 11, 2023Assignee: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
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Patent number: 11075187Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.Type: GrantFiled: October 30, 2018Date of Patent: July 27, 2021Assignee: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
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Publication number: 20210057378Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.Type: ApplicationFiled: November 5, 2020Publication date: February 25, 2021Applicant: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
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Publication number: 20190067241Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.Type: ApplicationFiled: October 30, 2018Publication date: February 28, 2019Applicant: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
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Patent number: 10153248Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.Type: GrantFiled: October 30, 2017Date of Patent: December 11, 2018Assignee: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
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Publication number: 20180068976Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.Type: ApplicationFiled: October 30, 2017Publication date: March 8, 2018Applicant: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
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Patent number: 9899285Abstract: A semiconductor device has a plurality of first semiconductor die. A plurality of first bumps is formed over the first semiconductor die. A first protection layer is formed over the first bumps. A portion of the first semiconductor die is removed in a backgrinding operation. A backside protection layer is formed over the first semiconductor die. An encapsulant is deposited over the first semiconductor die and first bumps. A portion of the encapsulant is removed to expose the first bumps. A conductive layer is formed over the first bumps and encapsulant. An insulating layer and plurality of second bumps are formed over the conductive layer. A plurality of conductive vias is formed through the encapsulant. A plurality of the semiconductor devices is stacked with the conductive vias electrically connecting the stacked semiconductor devices. A second semiconductor die having a through silicon via is disposed over the first semiconductor die.Type: GrantFiled: July 30, 2015Date of Patent: February 20, 2018Assignee: Semtech CorporationInventors: Kok Khoon Ho, Satyamoorthi Chinnusamy
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Semiconductor device and method of forming DCALGA package using semiconductor die with micro pillars
Patent number: 9875988Abstract: A semiconductor device has a first semiconductor die disposed over a substrate. A plurality of composite interconnect structures are formed over the semiconductor die. The composite interconnect structures have a non-fusible conductive pillar and a fusible layer formed over the non-fusible conductive pillar. The fusible layer is reflowed to connect the first semiconductor die to a conductive layer of the substrate. The non-fusible conductive pillar does not melt during reflow eliminating a need to form a solder resist over the substrate. An encapsulant is deposited around the first semiconductor die and composite interconnect structures. The encapsulant flows between the active surface of the first semiconductor die and the substrate. A second semiconductor die is disposed over the substrate adjacent to the first semiconductor die. A heat spreader is disposed over the first semiconductor die. A portion of the encapsulant is removed to expose the heat spreader.Type: GrantFiled: October 29, 2015Date of Patent: January 23, 2018Assignee: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Weng Hing Tan, Andrew Pan, Kok Khoon Ho -
Patent number: 9837375Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.Type: GrantFiled: February 26, 2016Date of Patent: December 5, 2017Assignee: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
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Publication number: 20170250158Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.Type: ApplicationFiled: February 26, 2016Publication date: August 31, 2017Applicant: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
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Publication number: 20170236790Abstract: A semiconductor device includes a substrate and a first conductive layer formed over a first surface of the substrate. The first conductive layer is patterned into a first portion of a first passive circuit element. The first conductive layer is patterned to include a first coiled portion. A second conductive layer is formed over a second surface of the substrate. The second conductive layer is patterned into a second portion of the first passive circuit element. The second conductive layer is patterned to include a second coiled portion exhibiting mutual inductance with the first coiled portion. A conductive via formed through the substrate is coupled between the first conductive layer and second conductive layer. A semiconductor component is disposed over the substrate and electrically coupled to the first passive circuit element. An encapsulant is deposited over the semiconductor component and substrate. The substrate is mounted to a printed circuit board.Type: ApplicationFiled: February 12, 2016Publication date: August 17, 2017Applicant: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Weng Hing Tan, Jayson Nathaniel S. Reyes
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Patent number: 9679785Abstract: A semiconductor device has a semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die. An insulating layer is formed over an active surface of the semiconductor die. A trench is formed in a non-active area of the semiconductor wafer between the semiconductor die. The trench extends partially through the semiconductor wafer. A carrier with adhesive layer is provided. The semiconductor die are disposed over the adhesive layer and carrier simultaneously as a single unit. A backgrinding operation is performed to remove a portion of the semiconductor wafer and expose the trench. The adhesive layer holds the semiconductor die in place during the backgrinding operation. An encapsulant is deposited over the semiconductor die and into the trench. The carrier and adhesive layer are removed. The encapsulated semiconductor die are cleaned and singulated into individual semiconductor devices. The electrical performance and functionality of the semiconductor devices are tested.Type: GrantFiled: July 27, 2015Date of Patent: June 13, 2017Assignee: Semtech CorporationInventor: Satyamoorthi Chinnusamy
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Publication number: 20170133323Abstract: A semiconductor device has a first substrate. A conductive layer is formed over the first substrate. A first cavity is formed through the first substrate and extending to the conductive layer. A first semiconductor die including a plurality of first interconnect structures is disposed in the first cavity. A second substrate is disposed over the first substrate. A second cavity is formed through second substrate. A second semiconductor die including a plurality of second interconnect structures is disposed in the second cavity. A discrete device or third semiconductor die is disposed over the second semiconductor die. A plurality of third interconnect structures is formed between the second substrate and discrete device or third semiconductor die. The first, second, and third interconnect structures are reflowed simultaneously. An encapsulant is deposited over and around the first semiconductor die, the second semiconductor die, and the discrete device or third semiconductor die.Type: ApplicationFiled: January 25, 2017Publication date: May 11, 2017Applicant: Semtech CorporationInventors: Kok Khoon Ho, Satyamoorthi Chinnusamy
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Semiconductor Device and Method of Forming DCALGA Package Using Semiconductor Die with Micro Pillars
Publication number: 20170125375Abstract: A semiconductor device has a first semiconductor die disposed over a substrate. A plurality of composite interconnect structures are formed over the semiconductor die. The composite interconnect structures have a non-fusible conductive pillar and a fusible layer formed over the non-fusible conductive pillar. The fusible layer is reflowed to connect the first semiconductor die to a conductive layer of the substrate. The non-fusible conductive pillar does not melt during reflow eliminating a need to form a solder resist over the substrate. An encapsulant is deposited around the first semiconductor die and composite interconnect structures. The encapsulant flows between the active surface of the first semiconductor die and the substrate. A second semiconductor die is disposed over the substrate adjacent to the first semiconductor die. A heat spreader is disposed over the first semiconductor die. A portion of the encapsulant is removed to expose the heat spreader.Type: ApplicationFiled: October 29, 2015Publication date: May 4, 2017Applicant: Semtech CorporationInventors: Satyamoorthi Chinnusamy, Weng Hing Tan, Andrew Pan, Kok Khoon Ho -
Patent number: 9601461Abstract: A semiconductor device has a first substrate. A conductive layer is formed over the first substrate. A first cavity is formed through the first substrate and extending to the conductive layer. A first semiconductor die including a plurality of first interconnect structures is disposed in the first cavity. A second substrate is disposed over the first substrate. A second cavity is formed through second substrate. A second semiconductor die including a plurality of second interconnect structures is disposed in the second cavity. A discrete device or third semiconductor die is disposed over the second semiconductor die. A plurality of third interconnect structures is formed between the second substrate and discrete device or third semiconductor die. The first, second, and third interconnect structures are reflowed simultaneously. An encapsulant is deposited over and around the first semiconductor die, the second semiconductor die, and the discrete device or third semiconductor die.Type: GrantFiled: August 12, 2015Date of Patent: March 21, 2017Assignee: Semtech CorporationInventors: Kok Khoon Ho, Satyamoorthi Chinnusamy
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Publication number: 20170047308Abstract: A semiconductor device has a first substrate. A conductive layer is formed over the first substrate. A first cavity is formed through the first substrate and extending to the conductive layer. A first semiconductor die including a plurality of first interconnect structures is disposed in the first cavity. A second substrate is disposed over the first substrate. A second cavity is formed through second substrate. A second semiconductor die including a plurality of second interconnect structures is disposed in the second cavity. A discrete device or third semiconductor die is disposed over the second semiconductor die. A plurality of third interconnect structures is formed between the second substrate and discrete device or third semiconductor die. The first, second, and third interconnect structures are reflowed simultaneously. An encapsulant is deposited over and around the first semiconductor die, the second semiconductor die, and the discrete device or third semiconductor die.Type: ApplicationFiled: August 12, 2015Publication date: February 16, 2017Applicant: SEMTECH CORPORATIONInventors: Kok Khoon Ho, Satyamoorthi Chinnusamy
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Publication number: 20170032981Abstract: A semiconductor device has a semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die. An insulating layer is formed over an active surface of the semiconductor die. A trench is formed in a non-active area of the semiconductor wafer between the semiconductor die. The trench extends partially through the semiconductor wafer. A carrier with adhesive layer is provided. The semiconductor die are disposed over the adhesive layer and carrier simultaneously as a single unit. A backgrinding operation is performed to remove a portion of the semiconductor wafer and expose the trench. The adhesive layer holds the semiconductor die in place during the backgrinding operation. An encapsulant is deposited over the semiconductor die and into the trench. The carrier and adhesive layer are removed. The encapsulated semiconductor die are cleaned and singulated into individual semiconductor devices. The electrical performance and functionality of the semiconductor devices are tested.Type: ApplicationFiled: July 27, 2015Publication date: February 2, 2017Applicant: SEMTECH CORPORATIONInventor: Satyamoorthi Chinnusamy
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Publication number: 20170033026Abstract: A semiconductor device has a plurality of first semiconductor die. A plurality of first bumps is formed over the first semiconductor die. A first protection layer is formed over the first bumps. A portion of the first semiconductor die is removed in a backgrinding operation. A backside protection layer is formed over the first semiconductor die. An encapsulant is deposited over the first semiconductor die and first bumps. A portion of the encapsulant is removed to expose the first bumps. A conductive layer is formed over the first bumps and encapsulant. An insulating layer and plurality of second bumps are formed over the conductive layer. A plurality of conductive vias is formed through the encapsulant. A plurality of the semiconductor devices is stacked with the conductive vias electrically connecting the stacked semiconductor devices. A second semiconductor die having a through silicon via is disposed over the first semiconductor die.Type: ApplicationFiled: July 30, 2015Publication date: February 2, 2017Applicant: SEMTECH CORPORATIONInventors: Kok Khoon Ho, Satyamoorthi Chinnusamy