Patents by Inventor Satyanarayan Gupta

Satyanarayan Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7197736
    Abstract: Described herein are two techniques referred to as “Adaptive Power Routing” and “Shield Sharing To Reduce Shield Count,” that allow power routing and signal routing to be integrated in a manner that provides more efficient and compact layout of design blocks as compared to traditional techniques. Adaptive power routing refers to completion of power routing to be postponed to the signal routing phase, at which time signal shielding requirements are also used to complete the power routing along with predefined power delivery constraints. Shield sharing optimization refers to the more efficient use of previously routed power lines and to the insertion of a reduced number of additional power lines so as to satisfy both shielding requirements and power supply requirements in a gridless environment.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: March 27, 2007
    Assignee: Intel Corporation
    Inventors: Prashant Saxena, Satyanarayan Gupta
  • Patent number: 6948048
    Abstract: A method for exchanging information within a mesh network that has an array of nodes defined by four quadrants. The method includes the initial step of exchanging information from a set of nodes in one quadrant to a set of nodes located in an adjacent quadrant. The exchange of information simultaneously occurs in both a vertical and horizontal direction within the array. Information is then exchanged between nodes within the same quadrant and subquadrants.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: September 20, 2005
    Assignee: Intel Corporation
    Inventors: Brent Baxter, Stuart Hawkinson, Satyanarayan Gupta
  • Publication number: 20040107411
    Abstract: Described herein are two techniques referred to as “Adaptive Power Routing” and “Shield Sharing To Reduce Shield Count,” that allow power routing and signal routing to be integrated in a manner that provides more efficient and compact layout of design blocks as compared to traditional techniques. Adaptive power routing refers to completion of power routing to be postponed to the signal routing phase, at which time signal shielding requirements are also used to complete the power routing along with predefined power delivery constraints. Shield sharing optimization refers to the more efficient use of previously routed power lines and to the insertion of a reduced number of additional power lines so as to satisfy both shielding requirements and power supply requirements in a gridless environment.
    Type: Application
    Filed: June 30, 2003
    Publication date: June 3, 2004
    Inventors: Prashant Saxena, Satyanarayan Gupta
  • Patent number: 6622294
    Abstract: Described herein are two techniques referred to as “Adaptive Power Routing” and “Shield Sharing To Reduce Shield Count,” that allow power routing and signal routing to be integrated in a manner that provides more efficient and compact layout of design blocks as compared to traditional techniques. Adaptive power routing refers to completion of power routing to be postponed to the signal routing phase, at which time signal shielding requirements are also used to complete the power routing along with predefined power delivery constraints. Shield sharing optimization refers to the more efficient use of previously routed power lines and to the insertion of a reduced number of additional power lines so as to satisfy both shielding requirements and power supply requirements in a gridless environment.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: September 16, 2003
    Assignee: Intel Corporation
    Inventors: Prashant Saxena, Satyanarayan Gupta
  • Publication number: 20030066041
    Abstract: Described herein are two techniques referred to as “Adaptive Power Routing” and “Shield Sharing To Reduce Shield Count,” that allow power routing and signal routing to be integrated in a manner that provides more efficient and compact layout of design blocks as compared to traditional techniques. Adaptive power routing refers to completion of power routing to be postponed to the signal routing phase, at which time signal shielding requirements are also used to complete the power routing along with predefined power delivery constraints. Shield sharing optimization refers to the more efficient use of previously routed power lines and to the insertion of a reduced number of additional power lines so as to satisfy both shielding requirements and power supply requirements in a gridless environment.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 3, 2003
    Inventors: Prashant Saxena, Satyanarayan Gupta
  • Publication number: 20030033500
    Abstract: A method for transferring information within a mesh network that has an array of nodes defined by four quadrants. The method includes the initial step of transferring information from a set of nodes in one quadrant to a set of nodes located in an adjacent quadrant. The transfer of information simultaneously occurs in both a vertical and horizontal direction within the array. Information is then transferred between nodes within the same quadrant and subquadrants.
    Type: Application
    Filed: July 2, 2002
    Publication date: February 13, 2003
    Inventors: Brent Baxter, Stuart Hawkinson, Satyanarayan Gupta
  • Patent number: 6460128
    Abstract: A method for exchanging information within a mesh network that has an array of nodes defined by four quadrants. The method includes the initial step of exchanging information from a set of nodes in one quadrant to a set of nodes located in an adjacent quadrant. The exchange of information simultaneously occurs in both a vertical and horizontal direction within the array. Information is then exchanged between nodes within the same quadrant and subquadrants.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: October 1, 2002
    Assignee: Intel Corporation
    Inventors: Brent Baxter, Stuart Hawkinson, Satyanarayan Gupta
  • Publication number: 20020056023
    Abstract: A method for transferring information within a mesh network that has an array of nodes defined by four quadrants. The method includes the initial step of transferring information from a set of nodes in one quadrant to a set of nodes located in an adjacent quadrant. The transfer of information simultaneously occurs in both a vertical and horizontal direction within the array. Information is then transferred between nodes within the same quadrant and subquadrants.
    Type: Application
    Filed: June 12, 2001
    Publication date: May 9, 2002
    Inventors: Brent Baxter, Stuart Hawkinson, Satyanarayan Gupta
  • Patent number: 6356992
    Abstract: A method for exchanging information within a mesh network that has an array of nodes defined by four quadrants. The method includes the initial step of exchanging information from a set of nodes in one quadrant to a set of nodes located in an adjacent quadrant. The exchange of information simultaneously occurs in both a vertical and horizontal direction within the array. Information is then exchanged between nodes within the same quadrant and subquadrants.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: March 12, 2002
    Assignee: Intel Corporation
    Inventors: Brent Baxter, Stuart Hawkinson, Satyanarayan Gupta
  • Patent number: 6173387
    Abstract: A method for exchanging information within a mesh network that has an array of nodes defined by four quadrants. The method includes the initial step of exchanging information from a set of nodes in one quadrant to a set of nodes located in an adjacent quadrant. The exchange of information simultaneously occurs in both a vertical and horizontal direction within the array. Information is then exchanged between nodes within the same quadrant and subquadrants.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: January 9, 2001
    Assignee: Intel Corporation
    Inventors: Brent Baxter, Stuart Hawkinson, Satyanarayan Gupta