Abstract: A device capable of producing a high resolution chemical analysis of a sample, such as fluid, is based upon nuclear magnetic resonance (NMR) spectroscopy. The nuclear magnetic polarizations of the sample are generated by sequentially illuminating the sample with a focused beam of light carrying angular orbital angular momentum (OAM) and possibly momentum (spin). Unlike in a typical NMR used for magnetic nuclear resonance imaging (MRI) or spectroscopy, the present device does not make use of a strong magnet.

Abstract: The present invention relates to a device capable of producing a high resolution chemical analysis of a sample, such as fluid, based upon nuclear magnetic resonance (NMR) spectroscopy, where the nuclear magnetic polarizations of the sample are generated by sequentially illuminating the sample with a focused beam of light carrying angular orbital angular momentum (OAM) and possibly momentum (spin). Unlike in usual NMR used for magnetic nuclear resonance imaging (MRI) or spectroscopy, the invention does not make use of a strong magnet.

Abstract: A multiple semiconductor chip (multi-chip) module for use in power applications includes at least a power semiconductor chip and a control semiconductor chip mounted on an electrically conductive heat sink. The power semiconductor chip may be a Silicon-On-Insulator (SOI) device and the control semiconductor chip may be a semiconductor device having a substrate connected to ground potential. The power semiconductor chip and the control semiconductor chip are directly mounted on the electrically conductive heat sink without the use of a separate electrical insulation layer in order to obtain a multi-chip module which is simple and economical to manufacture, and which offers superior performance characteristics.

Abstract: An integrated circuit for controlling an array of LEDs includes at least one signal amplifier, signal processing means, driver means for driving the array of light emitting diodes, at least one switch, and control means for controlling the integrated circuit. The integrated circuit is formed using silicon-on-insulator technology and is selectively shielded from the array of LEDs. The integrated drive electronics with silicon-on-insulator technology will allow for improved white light generation.

Abstract: A multiple semiconductor chip (multi-chip) module includes at least an output semiconductor chip and a control semiconductor chip mounted on an electrically conductive heat sink. The output semiconductor chip may have a bulk substrate configuration and the control semiconductor chip may have a Silicon-On-Insulator (SOI) configuration. The output semiconductor chip and the control semiconductor chip are directly mounted on the electrically conductive heat sink without the use of a separate electrical insulation layer in order to obtain a multi-chip module which is simple and economical to manufacture, and which offers superior performance characteristics such as enhanced heat sink efficiency and reduced EMI.

Abstract: An integrated circuit for controlling an array of LEDs includes at least one signal amplifier, signal processing means, driver means for driving the array of light emitting diodes, at least one switch, and control means for controlling the integrated circuit. The integrated circuit is formed using silicon-on-insulator technology and is selectively shielded from the array of LEDs. The integrated drive electronics with silicon-on-insulator technology will allow for improved white light generation.

Abstract: A multiple semiconductor chip (multi-chip) module includes at least an output semiconductor chip and a control semiconductor chip mounted on an electrically conductive heat sink. The output semiconductor chip may have a bulk substrate configuration and the control semiconductor chip may have a Silicon-On-Insulator (SOI) configuration. The output semiconductor chip and the control semiconductor chip are directly mounted on the electrically conductive heat sink without the use of a separate electrical insulation layer in order to obtain a multi-chip module which is simple and economical to manufacture, and which offers superior performance characteristics such as enhanced heat sink efficiency and reduced EMI.

Abstract: A multiple semiconductor chip (multi-chip) module for use in high-power applications includes at least a power semiconductor chip and a control semiconductor chip mounted on an electrically conductive heat sink. The power semiconductor chip may be a Silicon-On-Insulator (SOI) device and the control semiconductor chip may be a semiconductor device having a substrate connected to ground potential. The power semiconductor chip and the control semiconductor chip are directly mounted on the electrically conductive heat sink without the use of a separate electrical insulation layer in order to obtain a multi-chip module which is simple and economical to manufacture, and which offers superior performance characteristics.

Abstract: A silicon-on-insulator (SOI) hybrid transistor device structure includes a substrate, a buried insulating layer on the substrate, and a hybrid transistor device structure formed in a semiconductor surface layer on the buried insulating layer. The hybrid transistor device structure may advantageously include at least one MOS transistor structure and at least one conductivity modulation transistor structure electrically connected in parallel. In a particularly advantageous configuration, the MOS transistor structure may be an LDMOS transistor structure and the conductivity modulation transistor structure may be an LIGB transistor structure, with the hybrid transistor device being formed in a closed geometry configuration. This closed geometry configuration may have both substantially curved segments and substantially straight segments, with MOS structures being formed in the curved segments and conductivity modulation transistor structures being formed in the straight segments.

Abstract: An electrically erasable programmable memory device which is programmable in the manner of an EPROM and erasable in the manner of an EEPROM. A dielectric layer between the control gate and the floating gate is provided having a high dielectric constant. A thin, uniform gate dielectric layer is provided which demonstrates minimal trapping. Finally, an asymmetrical source/drain junction is provided wherein the source includes a shallow portion and a deeper portion, which deeper portion defines the overlap between the source and the floating gate. In the preferred embodiment the dielectric between the control gate and the floating gate comprises tantalum pentoxide, the thin dielectric layer comprises oxynitride, and the deep diffusion portion of the source comprises phosphorous.

Abstract: An electrically erasable programmable memory device which is programmable in the manner of an EPROM and erasable in the manner of an EEPROM. A dielectric layer between the control gate and the floating gate is provided having a high dielectric constant. A thin, uniform gate dielectric layer is provided which demonstrates minimal trapping. Finally, an asymmetrical source/drain junction is provided wherein the source includes a shallow portion and a deeper portion, which deeper portion defines the overlap between the source and the floating gate. In the preferred embodiment the dielectric between the control gate and the floating gate comprises tantalum pentoxide, the thin dielectric layer comprises oxynitride, and the deep diffusion portion of the source comprises phosphorous.