Patents by Inventor Saudas Dey

Saudas Dey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Phase lock loop with controllable lock time
    Patent number: 6856203
    Abstract: An improved phase locked loop (PLL) includes a frequency multiplier and a voltage controlled oscillator (VCO). The VCO includes a control circuit for automatically adjusting its initial free-running frequency in response to changes in an integer divider value. The adjusting is done so that the frequency difference between the initial free-running frequency divided by the integer divider value and a reference frequency is maintained at an approximately constant value. This results in a controllable lock time that is independent of the integer divider value.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: February 15, 2005
    Assignee: STMicroelectronics PVT. Ltd.
    Inventor: Saudas Dey
  • Phase locked loop (PLL)
    Publication number: 20030155981
    Abstract: An improved phase locked loop (PLL) includes a frequency multiplier and a voltage controlled oscillator (VCO). The VCO includes a control circuit for automatically adjusting its initial free-running frequency in response to changes in an integer divider value. The adjusting is done so that the frequency difference between the initial free-running frequency divided by the integer divider value and a reference frequency is maintained at an approximately constant value. This results in a controllable lock time that is independent of the integer divider value.
    Type: Application
    Filed: January 31, 2003
    Publication date: August 21, 2003
    Applicant: STMicroelectronics Pvt.Ltd.
    Inventor: Saudas Dey