Patents by Inventor Saul Lewites

Saul Lewites has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10120695
    Abstract: A processing system with multiple processing units may support separate operating systems (OSs) in separate partitions. During an initialization process, a preboot manager in the processing system may copy software to a sequestered area of memory in the processing system. The preboot manager may also configure the processing system to hide the sequestered area of memory from a first partition of the processing system. Also, the preboot manager may use a first processing unit in the processing system to boot an OS on the first partition, and the preboot manager may transmit a boot trigger from the first processing unit to a second processing unit in the processing system. The boot trigger may cause the second processing unit to use the software in the sequestered area of memory to boot a second partition of the processing system. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: November 6, 2018
    Assignee: Intel Corporation
    Inventors: Lyle Cool, Saul Lewites
  • Publication number: 20170046172
    Abstract: A processing system with multiple processing units may support separate operating systems (OSs) in separate partitions. During an initialization process, a preboot manager in the processing system may copy software to a sequestered area of memory in the processing system. The preboot manager may also configure the processing system to hide the sequestered area of memory from a first partition of the processing system. Also, the preboot manager may use a first processing unit in the processing system to boot an OS on the first partition, and the preboot manager may transmit a boot trigger from the first processing unit to a second processing unit in the processing system. The boot trigger may cause the second processing unit to use the software in the sequestered area of memory to boot a second partition of the processing system. Other embodiments are described and claimed.
    Type: Application
    Filed: July 11, 2013
    Publication date: February 16, 2017
    Applicant: Intel Corporation
    Inventors: Lyle Cool, Saul Lewites
  • Patent number: 9189246
    Abstract: A processing system with multiple processing units may support separate operating systems (OSs) in separate partitions. During an initialization process, a preboot manager in the processing system may copy software to a sequestered area of memory in the processing system. The preboot manager may also configure the processing system to hide the sequestered area of memory from a first partition of the processing system. Also, the preboot manager may use a first processing unit in the processing system to boot an OS on the first partition, and the preboot manager may transmit a boot trigger from the first processing unit to a second processing unit in the processing system. The boot trigger may cause the second processing unit to use the software in the sequestered area of memory to boot a second partition of the processing system. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: November 17, 2015
    Assignee: Intel Corporation
    Inventors: Lyle Cool, Saul Lewites
  • Publication number: 20140344429
    Abstract: A system and method of idle driven scheduling in a network device is disclosed. An interrupt signal is received from a timer, wherein a network processing component of a network device awakes from sleep mode of a first sleep duration for a first cycle upon receiving the interrupt signal. Load information of a computer processing unit in the network device for the first cycle is determined. A second sleep duration is selected for the network processing component in a second cycle based on the load information, wherein the second sleep duration is different from the first sleep duration. The timer is then instructed to send the interrupt signal to the network processing component at an expiration of the second sleep duration.
    Type: Application
    Filed: September 15, 2011
    Publication date: November 20, 2014
    Applicant: F5 Networks, Inc.
    Inventors: William R. Baumann, Saul Lewites
  • Patent number: 8886981
    Abstract: A system and method of idle driven scheduling in a network device is disclosed. An interrupt signal is received from a timer, wherein a network processing component of a network device awakes from sleep mode of a first sleep duration for a first cycle upon receiving the interrupt signal. Load information of a computer processing unit in the network device for the first cycle is determined. A second sleep duration is selected for the network processing component in a second cycle based on the load information, wherein the second sleep duration is different from the first sleep duration. The timer is then instructed to send the interrupt signal to the network processing component at an expiration of the second sleep duration.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: November 11, 2014
    Assignee: F5 Networks, Inc.
    Inventors: William R. Baumann, Saul Lewites
  • Patent number: 8838743
    Abstract: An apparatus and method for a dynamically extensible virtual switch. An apparatus or virtual switch includes at least one router and a data structure. The router utilizes the data structure to organize a connection between one or more virtual network interface cards (VNICs) to form a virtual network. The virtual switch also identifies a VNIC node of a data frame by its unique identifier, utilizes the unique identifier to index a collection of elements to retrieve a pointer to a virtual network head, and forwards the data frame to all VNIC nodes in a VNIC node listing associated with the virtual network head except for a VNIC node that relates to the unique identifier.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: September 16, 2014
    Assignee: Intel Corporation
    Inventors: Saul Lewites, Ajay Garg
  • Publication number: 20140223156
    Abstract: A processing system with multiple processing units may support separate operating systems (OSs) in separate partitions. During an initialization process, a preboot manager in the processing system may copy software to a sequestered area of memory in the processing system. The preboot manager may also configure the processing system to hide the sequestered area of memory from a first partition of the processing system. Also, the preboot manager may use a first processing unit in the processing system to boot an OS on the first partition, and the preboot manager may transmit a boot trigger from the first processing unit to a second processing unit in the processing system. The boot trigger may cause the second processing unit to use the software in the sequestered area of memory to boot a second partition of the processing system. Other embodiments are described and claimed.
    Type: Application
    Filed: July 11, 2013
    Publication date: August 7, 2014
    Applicant: Intel Corporation
    Inventors: Lyle Cool, Saul Lewites
  • Publication number: 20130254522
    Abstract: A processing system with multiple processing units may support separate operating systems (OSs) in separate partitions. During an initialization process, a preboot manager in the processing system may copy software to a sequestered area of memory in the processing system. The preboot manager may also configure the processing system to hide the sequestered area of memory from a first partition of the processing system. Also, the preboot manager may use a first processing unit in the processing system to boot an OS on the first partition, and the preboot manager may transmit a boot trigger from the first processing unit to a second processing unit in the processing system. The boot trigger may cause the second processing unit to use the software in the sequestered area of memory to boot a second partition of the processing system. Other embodiments are described and claimed.
    Type: Application
    Filed: February 7, 2013
    Publication date: September 26, 2013
    Inventors: Lyle Cool, Saul Lewites
  • Patent number: 8380973
    Abstract: A processing system with multiple processing units may support separate operating systems (OSs) in separate partitions. During an initialization process, a preboot manager in the processing system may copy software to a sequestered area of memory in the processing system. The preboot manager may also configure the processing system to hide the sequestered area of memory from a first partition of the processing system. Also, the preboot manager may use a first processing unit in the processing system to boot an OS on the first partition, and the preboot manager may transmit a boot trigger from the first processing unit to a second processing unit in the processing system. The boot trigger may cause the second processing unit to use the software in the sequestered area of memory to boot a second partition of the processing system. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: February 19, 2013
    Assignee: Intel Corporation
    Inventors: Lyle Cool, Saul Lewites
  • Patent number: 8301917
    Abstract: A processing system may include a first processing unit for a legacy partition and a second processing unit for a sequestered partition. In one embodiment, a first interrupt handler in the legacy partition may support power management for the first processing unit. A second interrupt handler in the sequestered partition may cause the sequestered partition to take control of power management hardware in the processing system when the legacy partition enters reduced power mode. For example, the second interrupt handler may program the power management hardware to route interrupts to the second processing unit. The sequestered partition may relinquish control of power management hardware to the legacy partition when the legacy partition exits reduced power mode. A power policy manager in the sequestered partition may support features such as wake for incoming communications, wake to record, etc. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: October 30, 2012
    Assignee: Intel Corporation
    Inventors: Krystof C. Zmudzinski, Saul Lewites
  • Patent number: 8261053
    Abstract: In a processing system with a main partition and a sequestered partition, the main partition sends an interrupt to the sequestered partition before calling an operating system (OS) boot loader for the main partition. The sequestered partition may then enter an interrupt handler. After the sequestered partition enters the interrupt handler, an address line of the processing system may be disabled, and the OS boot loader for the non-sequestered partition may be called. The sequestered partition may then determine whether the address line has been re-enabled. The sequestered partition may remain in the interrupt handler until after the address line has been re-enabled. Other embodiments are described and claimed.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: September 4, 2012
    Assignee: Intel Corporation
    Inventor: Saul Lewites
  • Patent number: 8041932
    Abstract: Devices in a processing system may be managed by performing a first scan of a bus of the processing system from a first partition. In one embodiment, the first scan may discover location information for devices on the bus. A communications hub of the processing system may be programmed to hide at least one of the devices on the bus. After the communications hub is so programmed, the first partition may scan the bus again. A second partition of the processing system may receive location information for one or more of the devices detected in the first scan but not detected in the second scan. In one embodiment, the second partition may boot, and then the communications hub may again be programmed to hide at least one of the devices on the bus. An operating system may then boot on the first partition. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: October 18, 2011
    Assignee: Intel Corporation
    Inventor: Saul Lewites
  • Publication number: 20110202778
    Abstract: A processing system may include a first processing unit for a legacy partition and a second processing unit for a sequestered partition. In one embodiment, a first interrupt handler in the legacy partition may support power management for the first processing unit. A second interrupt handler in the sequestered partition may cause the sequestered partition to take control of power management hardware in the processing system when the legacy partition enters reduced power mode. For example, the second interrupt handler may program the power management hardware to route interrupts to the second processing unit. The sequestered partition may relinquish control of power management hardware to the legacy partition when the legacy partition exits reduced power mode. A power policy manager in the sequestered partition may support features such as wake for incoming communications, wake to record, etc. Other embodiments are described and claimed.
    Type: Application
    Filed: August 3, 2010
    Publication date: August 18, 2011
    Inventors: Krystof C. Zmudzinski, Saul Lewites
  • Publication number: 20100325408
    Abstract: In a processing system with a main partition and a sequestered partition, the main partition sends an interrupt to the sequestered partition before calling an operating system (OS) boot loader for the main partition. The sequestered partition may then enter an interrupt handler. After the sequestered partition enters the interrupt handler, an address line of the processing system may be disabled, and the OS boot loader for the non-sequestered partition may be called. The sequestered partition may then determine whether the address line has been re-enabled. The sequestered partition may remain in the interrupt handler until after the address line has been re-enabled. Other embodiments are described and claimed.
    Type: Application
    Filed: May 11, 2010
    Publication date: December 23, 2010
    Inventor: Saul Lewites
  • Patent number: 7802081
    Abstract: Apparatus, systems, methods, and articles may operate to store one or more parameters associated with a pseudo-device in a device configuration table associated with a first partition within a multi-partition computing platform. An inter-partition bridge (IPB) may be exposed to an operating system executing within the first partition. The IPB may be adapted to couple the first partition to a second partition sequestered from the first partition. The IPB may be configured by the parameter(s) associated with the pseudo-device. Other embodiments may be described and claimed.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: September 21, 2010
    Assignee: Intel Corporation
    Inventors: Thomas Schultz, Saul Lewites
  • Patent number: 7797555
    Abstract: A processing system may include a first processing unit for a legacy partition and a second processing unit for a sequestered partition. In one embodiment, a first interrupt handler in the legacy partition may support power management for the first processing unit. A second interrupt handler in the sequestered partition may cause the sequestered partition to take control of power management hardware in the processing system when the legacy partition enters reduced power mode. For example, the second interrupt handler may program the power management hardware to route interrupts to the second processing unit. The sequestered partition may relinquish control of power management hardware to the legacy partition when the legacy partition exits reduced power mode. A power policy manager in the sequestered partition may support features such as wake for incoming communications, wake to record, etc. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: September 14, 2010
    Assignee: Intel Corporation
    Inventors: Krystof C. Zmudzinski, Saul Lewites
  • Patent number: 7752635
    Abstract: A system includes an interface device that executes a driver and a processing device that executes instructions to implement a virtual machine, and to implement a virtual network interface card that is configurable to enable communication between the driver and the virtual machine. The processor executes instructions to configure the virtual network interface card.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: July 6, 2010
    Assignee: Intel Corporation
    Inventor: Saul Lewites
  • Publication number: 20100131746
    Abstract: A processing system with multiple processing units may support separate operating systems (OSs) in separate partitions. During an initialization process, a preboot manager in the processing system may copy software to a sequestered area of memory in the processing system. The preboot manager may also configure the processing system to hide the sequestered area of memory from a first partition of the processing system. Also, the preboot manager may use a first processing unit in the processing system to boot an OS on the first partition, and the preboot manager may transmit a boot trigger from the first processing unit to a second processing unit in the processing system. The boot trigger may cause the second processing unit to use the software in the sequestered area of memory to boot a second partition of the processing system. Other embodiments are described and claimed.
    Type: Application
    Filed: October 26, 2009
    Publication date: May 27, 2010
    Inventors: Lyle Cool, Saul Lewites
  • Patent number: 7716465
    Abstract: In a processing system with a main partition and a sequestered partition, the main partition sends an interrupt to the sequestered partition before calling an operating system (OS) boot loader for the main partition. The sequestered partition may then enter an interrupt handler. After the sequestered partition enters the interrupt handler, an address line of the processing system may be disabled, and the OS boot loader for the non-sequestered partition may be called. The sequestered partition may then determine whether the address line has been re-enabled. The sequestered partition may remain in the interrupt handler until after the address line has been re-enabled. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: May 11, 2010
    Assignee: Intel Corporation
    Inventor: Saul Lewites
  • Patent number: 7647509
    Abstract: A processing system may include a first processing unit for a first partition and a second processing unit for a second partition. To support power management, an interrupt handler in the processing system may receive a standby command from an operating system. In response to receiving the standby command, the interrupt handler may cause the first processing unit to transition into a reduced power mode. After the second partition detects a wake event, the second partition may cause the first processing unit to transition out of the reduced power mode. In an example embodiment, the interrupt handler executes within the first partition, and the first processing unit transitions into the reduced power mode by entering an idle loop within the interrupt handler. The first partition may determine from within the idle loop whether the first partition has been released from the low power state. Other embodiments are described and claimed.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: January 12, 2010
    Assignee: Intel Corporation
    Inventors: Saul Lewites, Krystof Zmudzinski