Patents by Inventor Saumil Sanjay Shah

Saumil Sanjay Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Fixing of semiconductor hold time
    Patent number: 9430608
    Abstract: Computer implemented techniques are disclosed for fixing signal hold-time violations in semiconductor chips. Analysis includes estimation of hold-time requirements using ideal clocks. Allocation of placement regions within the design and near the macro circuits allows for later placement and wiring use during layout hold-time fixing. The placement region sizes are based on estimates of the needed buffers. Nets, within the design for detail routing, are ordered such that nets with hold-time violations are wired later, thus fixing hold-time violations without scaling or adding further buffers. Hold times are re-evaluated once wiring of track routes is complete.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: August 30, 2016
    Assignee: Synopsys, Inc.
    Inventors: Karthik Ramaseshan Kalpat, Rohit Kumar, Narendra Nimmagadda, Saumil Sanjay Shah, Hsiao-Ping Tseng
  • FIXING OF SEMICONDUCTOR HOLD TIME
    Publication number: 20160042117
    Abstract: Computer implemented techniques are disclosed for fixing signal hold-time violations in semiconductor chips. Analysis includes estimation of hold-time requirements using ideal clocks. Allocation of placement regions within the design and near the macro circuits allows for later placement and wiring use during layout hold-time fixing. The placement region sizes are based on estimates of the needed buffers. Nets, within the design for detail routing, are ordered such that nets with hold-time violations are wired later, thus fixing hold-time violations without scaling or adding further buffers. Hold times are re-evaluated once wiring of track routes is complete.
    Type: Application
    Filed: October 26, 2015
    Publication date: February 11, 2016
    Inventors: Karthik Ramaseshan Kalpat, Rohit Kumar, Narendra Nimmagadda, Saumil Sanjay Shah, Hsiao-Ping Tseng
  • Semiconductor hold time fixing
    Patent number: 9171112
    Abstract: Computer implemented techniques are disclosed for fixing signal hold-time violations in semiconductor chips. Analysis includes estimation of hold-time requirements using ideal clocks. Allocation of placement regions within the design and near the macro circuits allows for later placement and wiring use during layout hold-time fixing. The placement region sizes are based on estimates of the needed buffers. Nets, within the design for detail routing, are ordered such that nets with hold-time violations are wired later, thus fixing hold-time violations without scaling or adding further buffers. Hold times are re-evaluated once wiring of track routes is complete.
    Type: Grant
    Filed: December 7, 2013
    Date of Patent: October 27, 2015
    Assignee: Synopsys, Inc.
    Inventors: Karthik Ramaseshan Kalpat, Rohit Kumar, Narendra Nimmagadda, Saumil Sanjay Shah, Hsiao-Ping Tseng
  • SEMICONDUCTOR HOLD TIME FIXING
    Publication number: 20140165019
    Abstract: Computer implemented techniques are disclosed for fixing signal hold-time violations in semiconductor chips. Analysis includes estimation of hold-time requirements using ideal clocks. Allocation of placement regions within the design and near the macro circuits allows for later placement and wiring use during layout hold-time fixing. The placement region sizes are based on estimates of the needed buffers. Nets, within the design for detail routing, are ordered such that nets with hold-time violations are wired later, thus fixing hold-time violations without scaling or adding further buffers. Hold times are re-evaluated once wiring of track routes is complete.
    Type: Application
    Filed: December 7, 2013
    Publication date: June 12, 2014
    Applicant: Synopsys, Inc.
    Inventors: Karthik Ramaseshan Kalpat, Rohit Kumar, Narendra Nimmagadda, Saumil Sanjay Shah, Hsiao-Ping Tseng