Abstract: A method of moving material, using a first machine, from a first location to a second location, the second location being a dump bed of a second machine. The method includes determining, by a controller of the first machine, a type of a material to be moved, sending, by the controller of the first machine, the material type to a controller of the second machine, determining, by a controller of the second machine, a load distribution on the dump bed based on the material, determining, by the controller of the second machine, a first position of the dump bed at which a first dump should be unloaded from the first machine, and sending, by the controller of the second machine, an identification of the first position to the controller of the first machine.

Abstract: A system for false positive detection includes an interface and a processor. The interface is configured to receive a transaction data. The processor is configured to determine whether the transaction data is a statistical outlier; in response to the transaction data being the statistical outlier: query database data to determine whether the transaction data is a false positive; and in response to the transaction data being the false positive, indicate that the transaction data is normal.

Abstract: A method of using a static performance analyzer that accepts as input a cell-level netlist, to perform static performance analysis on a circuit represented by a transistor level netlist. The method begins with converting said transistor-level netlist to a cell-level netlist by modeling individual transistors with a cell model. Then, a static performance analyzer is used to perform a static performance analysis of said cell-level netlist. Among performance characteristics that may be analyzed are timing (static timing analysis) and leakage power. The method described may also be used for statistical static timing and power analysis.

Abstract: A method and system for integrated circuit optimization to improve performance and to reduce leakage power consumption of an integrated circuit (IC). The original IC includes a plurality of nominal cells, and each of the nominal cells includes a plurality of transistors. The method creates an optimized standard-cell library from a standard-cell library. The standard-cell library includes a plurality of nominal cells, and each of the nominal cells includes a plurality of transistors. Further, an optimized IC is generated by using the optimized standard-cell library from the original IC. The optimized IC has an improved performance and reduced leakage power characteristics, as compared to the original IC.

Abstract: Methods and systems for assessing risks associated with a project. The method includes building a tier 1 library and a tier 2 library. The tier 2 library includes project templates specific to a service/product offering or project type. Building the tier 1 and tier 2 libraries includes identifying project activities associated with a project. The building also includes identifying at least one potential failure associated with each of the project activities, associating project activities that are determined to be generic to all projects with the tier 1 library, and associating project activities that are determined not to be generic to all projects with each of the project templates in the tier 2 library. The method also includes generating a project file from the tier 1 and tier 2 libraries, and calculating a baseline risk score for each of the project activities in the project file.