Patents by Inventor Saumya Sharma

Saumya Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220214686
    Abstract: A system for servicing a data center using an autonomous vehicle (AV) is provided. The system comprises the AV and the AV is configured to: receive a task to perform within the data center, wherein the data center comprises a plurality of servers associated with a plurality of enterprise organizations; navigate from an initial location within the data center to a new location within the data center along a path extending through a portion of the data center, the path being determined automatically; and while navigating the path and in response to encountering a movable barrier disposed along the path, performing a procedure to bypass the movable barrier such that the AV can continue navigating along the path.
    Type: Application
    Filed: January 5, 2021
    Publication date: July 7, 2022
    Applicant: ABB Schweiz AG
    Inventors: Gregory A. Cole, Harshang Shah, William J. Eakins, Saumya Sharma, Thomas A. Fuhlbrigge
  • Patent number: 11370124
    Abstract: A system and method for predicting the location at which a feature that is being tracked during a robotic assembly operation will be located within one or more images captured by a vision device. A vision device can be mounted to a robot such that the location of the vision device as the robot moves can be known or determined. In the event of an interruption of the tracking of the feature by the vision device as the corresponding workpiece is moving, the location of the feature relative to a vision device can be predicted, such as, via use of current or past historical movement information for the feature and/or the associated workpiece. Using the predicted location of the feature and the known location of the vision device, the location at which the feature will be located in an image(s) captured by the vision device can be predicted.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: June 28, 2022
    Assignee: ABB Schweiz AG
    Inventors: Biao Zhang, Jianjun Wang, Yixin Liu, Saumya Sharma, Jorge Vidal-Ribas, Jordi Artigas, Ramon Casanelles
  • Patent number: 11361987
    Abstract: A method for making a semiconductor apparatus includes forming a first bottom interconnect in a device area of a first dielectric layer; fabricating a device on top of the first bottom interconnect; capping the device with a first interlayer dielectric; exposing a logic area of the first dielectric layer that is adjacent to the device area by removing a portion of the first interlayer dielectric from the first dielectric layer while leaving another portion of the first interlayer dielectric that caps the device; and forming a second bottom interconnect in the logic area of the first dielectric layer. By forming the second bottom interconnect after the device fabrication and capping, damage to the device and to the second bottom interconnect is avoided.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: June 14, 2022
    Assignee: International Business Machines Corporation
    Inventors: Ashim Dutta, Saumya Sharma, Tianji Zhou, Chih-Chao Yang
  • Patent number: 11360120
    Abstract: A method and system for acquiring, manipulating and displaying inspection data obtained by sensors associated with submersible inspection vehicle within a housing having a liquid medium is disclosed in the present application. A control system including an electronic controller is operably coupled with the inspection vehicle and is configured to display data transmitted from the sensor and overlay input data from an operator on the display to facilitate real time analysis during the inspection event.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: June 14, 2022
    Assignee: HITACHI ENERGY SWITZERLAND AG
    Inventors: Gregory A. Cole, William J. Eakins, Daniel T. Lasko, Harshang Shah, Thomas A. Fuhlbrigge, Luiz V. Cheim, Poorvi Patel, Biao Zhang, Saumya Sharma, Sanguen Choi
  • Patent number: 11251368
    Abstract: A method includes forming a first metallization layer containing a first metal-containing line and a second metal-containing line disposed in a first interlevel dielectric layer. The first metal-containing line includes a first conductive metal and the second metal-containing line includes a second conductive metal. The first metal-containing line and the second metal-containing line are recessed to below a top surface of the interlevel dielectric layer. A metal-containing cap protection layer is deposited in a recessed portion of the first metal-containing line and the second metal-containing line. The metal-containing cap protection layer includes a third conductive metal which is different than the first conductive metal and the second conductive metal.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: February 15, 2022
    Assignee: International Business Machines Corporation
    Inventors: Tianji Zhou, Saumya Sharma, Ashim Dutta, Chih-Chao Yang
  • Patent number: 11244907
    Abstract: Methods and structures for improving alignment contrast for patterning a metal layer generally includes depositing a metal layer having a plurality of grains, wherein grain boundaries between the grains forms grooves at a surface of the metal layer. The metal layer is subjected to surface treatment to form an oxide or a nitride layer and fill the surface grooves. The metal layer can be patterned using alignment marks in the metal layer and/or underlying layers. Filling the grooves with the oxide or nitride increases alignment contrast relative to patterning the metal layer without the surface treating.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: February 8, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tianji Zhou, Saumya Sharma, Dominik Metzler, Chih-Chao Yang, Theodorus E. Standaert
  • Patent number: 11239160
    Abstract: E-fuses and techniques for fabrication thereof using dielectric zipping are provided. An e-fuse device includes: a first dielectric layer disposed on a substrate; at least one first electrode of the e-fuse device present in the first dielectric layer; a second dielectric layer disposed on the first dielectric layer; vias present in the second dielectric layer, wherein at least one of the vias is present over the at least one first electrode and has a critical dimension CDA?, wherein the vias adjacent to the at least one via having the critical dimension CDA? each have a critical dimension of CDB?, and wherein CDB?>CDA?; a liner disposed in each of the vias; and a metal that serves as a second electrode of the e-fuse device disposed in each of the vias over the liner. A method of operating an e-fuse device is also provided.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: February 1, 2022
    Assignee: International Business Machines Corporation
    Inventors: Tianji Zhou, Saumya Sharma, Ashim Dutta, Chih-Chao Yang
  • Patent number: 11227997
    Abstract: Embodiments of the present invention are directed to forming a planar Resistive Random Access Memory (RRAM) device with a shared top electrode. In a non-limiting embodiment of the invention, a first trench having a first width and a second trench having a second width less than the first width are formed in a dielectric layer. A bottom liner is formed on sidewalls of the first trench. The bottom liner pinches off the second trench. A top liner is formed on sidewalls of the bottom liner in the first trench. The top liner is formed such that a portion of the bottom liner at a bottommost region of the first trench remains exposed. The exposed portion of the bottom liner is removed, and a memory cell material is formed in the first trench.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: January 18, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ashim Dutta, Saumya Sharma, Tianji Zhou, Chih-Chao Yang
  • Publication number: 20220013723
    Abstract: Embodiments of the present invention are directed to forming a planar Resistive Random Access Memory (RRAM) device with a shared top electrode. In a non-limiting embodiment of the invention, a first trench having a first width and a second trench having a second width less than the first width are formed in a dielectric layer. A bottom liner is formed on sidewalls of the first trench. The bottom liner pinches off the second trench. A top liner is formed on sidewalls of the bottom liner in the first trench. The top liner is formed such that a portion of the bottom liner at a bottommost region of the first trench remains exposed. The exposed portion of the bottom liner is removed, and a memory cell material is formed in the first trench.
    Type: Application
    Filed: July 7, 2020
    Publication date: January 13, 2022
    Inventors: Ashim Dutta, Saumya Sharma, Tianji Zhou, Chih-Chao Yang
  • Publication number: 20210391256
    Abstract: E-fuses and techniques for fabrication thereof using dielectric zipping are provided. An e-fuse device includes: a first dielectric layer disposed on a substrate; at least one first electrode of the e-fuse device present in the first dielectric layer; a second dielectric layer disposed on the first dielectric layer; vias present in the second dielectric layer, wherein at least one of the vias is present over the at least one first electrode and has a critical dimension CDA?, wherein the vias adjacent to the at least one via having the critical dimension CDA? each have a critical dimension of CDB?, and wherein CDB?>CDA?; a liner disposed in each of the vias; and a metal that serves as a second electrode of the e-fuse device disposed in each of the vias over the liner. A method of operating an e-fuse device is also provided.
    Type: Application
    Filed: June 16, 2020
    Publication date: December 16, 2021
    Inventors: Tianji Zhou, Saumya Sharma, Ashim DUTTA, Chih-Chao Yang
  • Publication number: 20210375986
    Abstract: A technique relates to an integrated circuit (IC). Pillars of a set of memory elements are formed. A bilayer dielectric is formed between the pillars, the bilayer dielectric having an upper dielectric material formed on a lower dielectric material without requiring an etch of the lower dielectric material prior to forming the upper dielectric material, thereby preventing a void in the bilayer dielectric, the lower dielectric material including one or more flowable dielectric materials.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Inventors: Ashim Dutta, Saumya Sharma, Tianji Zhou, Chih-Chao Yang
  • Publication number: 20210358801
    Abstract: A method for making a semiconductor apparatus includes forming a first bottom interconnect in a device area of a first dielectric layer; fabricating a device on top of the first bottom interconnect; capping the device with a first interlayer dielectric; exposing a logic area of the first dielectric layer that is adjacent to the device area by removing a portion of the first interlayer dielectric from the first dielectric layer while leaving another portion of the first interlayer dielectric that caps the device; and forming a second bottom interconnect in the logic area of the first dielectric layer. By forming the second bottom interconnect after the device fabrication and capping, damage to the device and to the second bottom interconnect is avoided.
    Type: Application
    Filed: May 14, 2020
    Publication date: November 18, 2021
    Inventors: Ashim Dutta, Saumya Sharma, Tianji Zhou, Chih-Chao Yang
  • Patent number: 11177213
    Abstract: An anti-fuse device having enhanced programming efficiency is provided. The anti-fuse device includes via contact structures that have different critical dimensions located between a first electrode and a second electrode. Notably, a first via contact structure having a first critical dimension is provided between a pair of second via contact structures having a second critical dimension that is greater than the first critical dimension. When a voltage is applied to the device, dielectric breakdown will occur first through the first via contact structure having the first critical dimension.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: November 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Chih-Chao Yang, Baozhen Li, Tianji Zhou, Ashim Dutta, Saumya Sharma
  • Publication number: 20210339397
    Abstract: A robotic assembly operation is provided for assembling a second part to a first part. During setup of the assembly operation, control parameters and a control scheme are set and changed by simulating the operation and testing whether performance requirements are met. A dry run may be performed thereafter, and test data may be collected after running the simulation to determine if the performance requirements are satisfied during the dry run. During production, production data may also be collected and control parameters may be tuned when changes occur during production in order to maintain stable assembly.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 4, 2021
    Inventors: Biao Zhang, Saumya Sharma, Yixin Liu, Jianjun Wang, Will Eakins, Andrew M. Salm, Yun Hsuan Su, Jorge Vidal-Ribas, Jordi Artigas, Ramon Casanelles
  • Publication number: 20210339387
    Abstract: A robotic system is provided for assembling parts together. In the assembly process, both parts are moving separately with one part moving on an assembly base and another part moving on a moveable arm of a robot base. Motion data is measured by an inertial measurement (IMU) sensor. Movement of the robot base or moveable arm is then compensated based on the measured motion to align the first and second parts with each other and assemble the parts together.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 4, 2021
    Inventors: Biao Zhang, Saumya Sharma, Yixin Liu, Jianjun Wang, Will Eakins, Andrew M. Salm, Yun Hsuan Su, Jorge Vidal-Ribas, Jordi Artigas, Ramon Casanelles
  • Publication number: 20210331322
    Abstract: A system and method for predicting the location at which a feature that is being tracked during a robotic assembly operation will be located within one or more images captured by a vision device. A vision device can be mounted to a robot such that the location of the vision device as the robot moves can be known or determined. In the event of an interruption of the tracking of the feature by the vision device as the corresponding workpiece is moving, the location of the feature relative to a vision device can be predicted, such as, via use of current or past historical movement information for the feature and/or the associated workpiece. Using the predicted location of the feature and the known location of the vision device, the location at which the feature will be located in an image(s) captured by the vision device can be predicted.
    Type: Application
    Filed: April 23, 2020
    Publication date: October 28, 2021
    Inventors: Biao Zhang, Jianjun Wang, Yixin Liu, Saumya Sharma, Jorge Vidal-Ribas, Jordi Artigas, Ramon Casanelles
  • Publication number: 20210323164
    Abstract: A system and method that automatically resolves conflicts among sensor information in a sensor fusion robot system. Such methods can accommodate converging ambiguous and divergent sensor information in a manner that can allow continued, and relatively accurate, robotic operations. The processes can include handling sensor conflict via sensor prioritization, including, but not limited, prioritization based on the particular stage or segment of the assembly operation when the conflict occurs, overriding sensor data that exceeds a threshold value, and/or prioritization based on evaluations of recent sensor performance, predictions, system configuration, and/or historical information. The processes can include responding to sensor conflicts through comparisons of the accuracy of workpiece location predictions from different sensors during different assembly stages in connection with arriving at a determination of which sensor(s) is providing accurate and reliable predictions.
    Type: Application
    Filed: April 17, 2020
    Publication date: October 21, 2021
    Inventors: Biao Zhang, Jianjun Wang, Yixin Liu, Saumya Sharma, Jorge Vidal-Ribas, Jordi Artigas, Ramon Casanelles
  • Publication number: 20210328137
    Abstract: A method includes forming a first metallization layer containing a first metal-containing line and a second metal-containing line disposed in a first interlevel dielectric layer. The first metal-containing line includes a first conductive metal and the second metal-containing line includes a second conductive metal. The first metal-containing line and the second metal-containing line are recessed to below a top surface of the interlevel dielectric layer. A metal-containing cap protection layer is deposited in a recessed portion of the first metal-containing line and the second metal-containing line. The metal-containing cap protection layer includes a third conductive metal which is different than the first conductive metal and the second conductive metal.
    Type: Application
    Filed: April 20, 2020
    Publication date: October 21, 2021
    Inventors: Tianji Zhou, Saumya Sharma, Ashim Dutta, Chih-Chao Yang
  • Publication number: 20210323158
    Abstract: A system and method for automatic recovery from a failure in a robotic assembly operation using multiple sensor input. Moreover, following detection of an error in an assembly operation from data provided by a first sensor, a recovery plan can be executed, and, if successful, a reattempt at the failed assembly operation can commence. The assembly stage during which the error occurred can be detected by a second sensor that is different from the first sensor. Identification of the assembly stage can assist with determining the recovery plan, as well as identifying the assembly operation that is to be reattempted. The failure can be detected by comparing information obtained from a sensor, such as, for example, a force signature, with corresponding historical information, including historical information obtained at the identified assembly stage for prior workpieces.
    Type: Application
    Filed: April 17, 2020
    Publication date: October 21, 2021
    Inventors: Biao Zhang, Jianjun Wang, Yixin Liu, Saumya Sharma, Jorge Vidal-Ribas, Jordi Artigas, Ramon Casanelles
  • Publication number: 20210233843
    Abstract: An anti-fuse device having enhanced programming efficiency is provided. The anti-fuse device includes via contact structures that have different critical dimensions located between a first electrode and a second electrode. Notably, a first via contact structure having a first critical dimension is provided between a pair of second via contact structures having a second critical dimension that is greater than the first critical dimension. When a voltage is applied to the device, dielectric breakdown will occur first through the first via contact structure having the first critical dimension.
    Type: Application
    Filed: January 28, 2020
    Publication date: July 29, 2021
    Inventors: Chih-Chao Yang, Baozhen Li, Tianji Zhou, Ashim Dutta, Saumya Sharma