Patents by Inventor Saurabh Roy

Saurabh Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119384
    Abstract: A system according to various embodiments manages user interactions with a helpdesk. The system determines a user satisfaction quota for a user based on an aggregate frequency with which the user called the helpdesk. The helpdesk receives a new call from the user. The new call is answered by an agent of the helpdesk. The system determines a recent interaction score and compares the recent interaction score with the user satisfaction quota for the user. If the system determines based on the comparison, whether the user is a dissatisfied user. If the user is marked as a dissatisfied user, the system generates a summary of a context identifying factors likely to contribute to dissatisfaction of the user and sends the summary of the context for presentation the agent of the helpdesk.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Inventors: Saurabh Kumar, Arushi Jain, Debangshu Roy
  • Publication number: 20240090355
    Abstract: A piezoresistive transistor device includes a first transistor cell having a first piezoelectric material body and a first piezoresistive material body arranged in a stacked configuration. A first electrical resistance of the first piezoresistive material body is dependent upon a voltage applied across the first piezoelectric material body by way of a pressure applied by the first piezoelectric material body to the first piezoresistive material body. A second transistor cell includes a second piezoelectric material body and a second piezoresistive material body arranged in a stacked configuration. A second electrical resistance of the second piezoresistive material body is dependent upon a voltage applied across the second piezoelectric material body by way of a pressure applied by the second piezoelectric material body to the second piezoresistive material body.
    Type: Application
    Filed: August 24, 2023
    Publication date: March 14, 2024
    Inventors: Saurabh Roy, Josef Anton Moser, Hans-Joachim Schulze
  • Publication number: 20240055257
    Abstract: The disclosure relates to a method for manufacturing a contact on a SiC substrate, wherein the method includes: providing a crystalline SiC substrate; modifying a crystal structure in a surface area of the SiC substrate such that a carbon-enriched SiC portion is generated in the surface area; forming a contact layer on the SiC substrate by depositing a metallic contact material onto the surface area that includes the carbon-enriched SiC portion; and thermal annealing of at least a part of the carbon-enriched SiC portion of the SiC substrate and at least a part of the contact layer, such that a ternary metallic phase portion including at least the metallic contact material, silicon, and carbon is generated. Furthermore, SiC semiconductor devices are described, which include a crystalline SiC substrate and a contact layer including a ternary metallic phase portion directly in contact with the SiC substrate surface.
    Type: Application
    Filed: July 27, 2023
    Publication date: February 15, 2024
    Inventors: Saurabh Roy, Werner Schustereder, Ravi Keshav Joshi, Hans-Joachim Schulze, Daria Krasnozhon
  • Publication number: 20240030032
    Abstract: The present disclosure generally relates to a method of manufacturing a contact on a silicon carbide semiconductor substrate wherein the method comprises providing a 4H—SiC semiconductor substrate, irradiating a surface area of the 4H—SiC semiconductor substrate with a first thermal annealing laser beam, thereby generating a phase separation of the surface area comprising at least a 3C—SiC layer, and depositing a contact material onto the 3C—SiC layer to form a contact layer on the semiconductor substrate. The disclosure further relates to a silicon carbide semiconductor device with an Ohmic contact comprising a 4H—SiC semiconductor substrate, a 3C—SiC layer, and a contact layer directly in contact with the 3C—SiC layer at the semiconductor surface.
    Type: Application
    Filed: July 21, 2023
    Publication date: January 25, 2024
    Inventors: Saurabh ROY, Ravi Keshav JOSHI, Hans-Joachim SCHULZE, Bernhard GOLLER, Daria KRASNOZHON
  • Publication number: 20230411460
    Abstract: A method of producing a semiconductor device includes forming a plurality of transistor cells in a SiC substrate and electrically connected in parallel to form a transistor having a specified operating temperature range. Forming each transistor cell includes forming a gate structure having a gate electrode, and a gate dielectric stack separating the gate electrode from the SiC substrate and including a ferroelectric insulator. The method further includes doping the ferroelectric insulator with a doping material such that the Curie temperature of the ferroelectric insulator is in a range above the specified operating temperature range of the transistor.
    Type: Application
    Filed: September 5, 2023
    Publication date: December 21, 2023
    Inventors: Saurabh Roy, Thomas Aichinger, Hans-Joachim Schulze
  • Publication number: 20230343871
    Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; a trench formed in a first main surface of the semiconductor substrate; a field plate electrode in the trench and reaching a same level as the first main surface of the semiconductor substrate; an insulating material that separates the field plate electrode from the semiconductor substrate; and a material embedded in the field plate electrode. The field plate electrode is made of a different material than the material embedded in the field plate electrode. The trench adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. Additional device embodiments and methods of producing the semiconductor device are also described.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 26, 2023
    Inventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
  • Patent number: 11791383
    Abstract: A semiconductor device includes a SiC substrate and a plurality of transistor cells formed in the SiC substrate and electrically connected in parallel to form a transistor. Each transistor cell includes a gate structure including a gate electrode and a gate dielectric stack separating the gate electrode from the SiC substrate. The gate dielectric stack includes a ferroelectric insulator. The transistor has a specified operating temperature range, and the ferroelectric insulator is doped with a doping material such that the Curie temperature of the ferroelectric insulator is in a range above the specified operating temperature range of the transistor. A corresponding method of producing the semiconductor device is also described.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: October 17, 2023
    Assignee: Infineon Technologies AG
    Inventors: Saurabh Roy, Thomas Aichinger, Hans-Joachim Schulze
  • Patent number: 11728427
    Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; an electrode structure on or in the semiconductor substrate, the electrode structure including an electrode and an insulating material that separates the electrode from the semiconductor substrate; and a strain-inducing material embedded in the electrode. The electrode structure adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. The electrode is under either tensile or compressive stress in the first direction. The strain-inducing material either enhances or at least partly counteracts the stress of the electrode in the first direction. Methods of producing the semiconductor device are also described.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: August 15, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
  • Publication number: 20230238442
    Abstract: A semiconductor device includes a semiconductor substrate and a metal nitride layer above the semiconductor substrate. The metal nitride layer forms at least one interface region with the semiconductor substrate. The at least one interface region includes a first portion of the semiconductor substrate, a first portion of the metal nitride layer, and an interface between the first portion of the semiconductor substrate and the first portion of the metal nitride layer. A concentration of nitrogen content at the first portion of the metal nitride layer is higher than a concentration of nitrogen content at a second portion, of the metal nitride layer, outside the interface region. A distribution of nitrogen content throughout the metal nitride layer may have a maximum concentration at the first portion of the metal nitride layer. Alternatively and/or additionally, a method for producing such a semiconductor device is provided herein.
    Type: Application
    Filed: January 17, 2023
    Publication date: July 27, 2023
    Inventors: Ravi Keshav JOSHI, Romain ESTEVE, Saurabh ROY, Bernhard GOLLER, Werner SCHUSTEREDER, Kristijan Luka MLETSCHNIG
  • Publication number: 20230178615
    Abstract: A power transistor device includes a semiconductor substrate, a gate trench extending into the semiconductor substrate, a transistor gate provided in the gate trench, and an insulating structure formed between the transistor gate and a side wall of the gate trench. The insulating structure is configured to electrically insulate the transistor gate from a channel region which extends along the side wall of the gate trench. The insulating structure includes a layer of piezoelectric material.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 8, 2023
    Inventors: Saurabh Roy, Hans-Joachim Schulze, Oliver Blank, Josef Anton Moser, Thomas Aichinger
  • Publication number: 20230035144
    Abstract: A semiconductor device includes a SiC substrate and a plurality of transistor cells formed in the SiC substrate and electrically connected in parallel to form a transistor. Each transistor cell includes a gate structure including a gate electrode and a gate dielectric stack separating the gate electrode from the SiC substrate. The gate dielectric stack includes a ferroelectric insulator. The transistor has a specified operating temperature range, and the ferroelectric insulator is doped with a doping material such that the Curie temperature of the ferroelectric insulator is in a range above the specified operating temperature range of the transistor. A corresponding method of producing the semiconductor device is also described.
    Type: Application
    Filed: July 28, 2021
    Publication date: February 2, 2023
    Inventors: Saurabh Roy, Thomas Aichinger, Hans-Joachim Schulze
  • Publication number: 20220406937
    Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; an electrode structure on or in the semiconductor substrate, the electrode structure including an electrode and an insulating material that separates the electrode from the semiconductor substrate; and a strain-inducing material embedded in the electrode. The electrode structure adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. The electrode is under either tensile or compressive stress in the first direction. The strain-inducing material either enhances or at least partly counteracts the stress of the electrode in the first direction. Methods of producing the semiconductor device are also described.
    Type: Application
    Filed: June 21, 2021
    Publication date: December 22, 2022
    Inventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
  • Publication number: 20220235470
    Abstract: A method for fabricating a semiconductor device comprises depositing a TiW layer on a semiconductor substrate, depositing a Ti layer on the TiW layer, depositing a Ni alloy layer on the Ti layer, depositing an Ag layer on the Ni alloy layer, at least partially covering the Ag layer with photoresist, wet etching the Ag layer and the Ni alloy layer, and dry etching the Ti layer and the TiW layer.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 28, 2022
    Inventors: Saurabh Roy, Matteo Dainese, Michael Ehmann, Hiroshi Narahashi, Johanna Schlaminger, Katharina Teichmann, Sigrid Wabnig