Patents by Inventor Saurabh Vats

Saurabh Vats has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230085075
    Abstract: A latency processing system detects traffic at a cloud service end point and analyzes packets in the detected traffic to identify a network configuration of a client that is accessing the cloud service. Latency components corresponding to different parts of the network configuration are identified and quantified. A recommendation engine is controlled to generate and surface an output indicative of recommendations for reducing network latency.
    Type: Application
    Filed: September 10, 2021
    Publication date: March 16, 2023
    Inventors: Srinivasachakrapani KOTIPALLI, Brad RUTKOWSKI, Paul James ANDREW, Konstantin RYVKIN, Chittaranjan Sadanand PATTEKAR, Saurabh VATS
  • Patent number: 11606267
    Abstract: A latency processing system detects traffic at a cloud service end point and analyzes packets in the detected traffic to identify a network configuration of a client that is accessing the cloud service. Latency components corresponding to different parts of the network configuration are identified and quantified. A recommendation engine is controlled to generate and surface an output indicative of recommendations for reducing network latency.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: March 14, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Srinivasachakrapani Kotipalli, Brad Rutkowski, Paul James Andrew, Konstantin Ryvkin, Chittaranjan Sadanand Pattekar, Saurabh Vats
  • Patent number: 11522751
    Abstract: The present application describes a detect, alert and recovery system for various cloud-based and/or network-based services. The detect, alert and recovery system receives network performance data associated with a particular namespace from various network information sources. The network performance data may be aggregated based on various scopes. The aggregated data is then analyzed to determine whether an anomaly exists. If an anomaly exists, the detect, alert and recovery system may cause the performance of various actions in order to address the anomaly.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: December 6, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Rajesh Kumar Maskara, Srinivasachakrapani Kotipalli, Saurabh Vats, Irina Andreea Rosoiu, Malvika Modi, Fangwen Yu, Liting Zhao, Zhenguo Yang, Bradley David Rutkowski, Todd Carlyle Luttinen, Xuelin Chen
  • Publication number: 20220376968
    Abstract: The present application describes a detect, alert and recovery system for various cloud-based and/or network-based services. The detect, alert and recovery system receives network performance data associated with a particular namespace from various network information sources. The network performance data may be aggregated based on various scopes. The aggregated data is then analyzed to determine whether an anomaly exists. If an anomaly exists, the detect, alert and recovery system may cause the performance of various actions in order to address the anomaly.
    Type: Application
    Filed: May 21, 2021
    Publication date: November 24, 2022
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Rajesh Kumar MASKARA, Srinivasachakrapani KOTIPALLI, Saurabh VATS, Irina Andreea ROSOIU, Malvika MODI, Fangwen YU, Liting ZHAO, Zhenguo YANG, Bradley David RUTKOWSKI, Todd Carlyle LUTTINEN, Xuelin CHEN
  • Patent number: 7978449
    Abstract: An integrated electrostatic discharge (ESD) protection circuitry for a signal electrode. Coupled in shunt between the signal electrode and the positive and negative power supply electrodes are opposing sets of multiple diodes coupled in series. Each set includes a diode across which is applied a nominal reverse bias voltage. These opposing reverse bias voltages are maintained at substantially constant predetermined nominal magnitudes in relation to the voltage at the signal electrode, thereby ensuring minimal leakage current via the signal electrode over the full dynamic range of the signal.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: July 12, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Kenneth J. Carroll, Saurabh Vats
  • Patent number: 7564308
    Abstract: An operational amplifier in accordance with one embodiment of the invention includes folded cascode transistors and a self-biased common-mode feedback circuit coupled to the folded cascode transistors. The operational amplifier can include an output stage coupled to the self-biased common-mode feedback circuit and the folded cascode transistors.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: July 21, 2009
    Assignee: National Semiconductor Corporation
    Inventor: Saurabh Vats
  • Publication number: 20090141413
    Abstract: An integrated electrostatic discharge (ESD) protection circuitry for a signal electrode. Coupled in shunt between the signal electrode and the positive and negative power supply electrodes are opposing sets of multiple diodes coupled in series. Each set includes a diode across which is applied a nominal reverse bias voltage These opposing reverse bias voltages are maintained at substantially constant predetermined nominal magnitudes in relation to the voltage at the signal electrode, thereby ensuring minimal leakage current via the signal electrode over the full dynamic range of the signal.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 4, 2009
    Applicant: National Semiconductor Corporation
    Inventors: Kenneth J. Carroll, Saurabh Vats