Abstract: Methods, devices, and systems for driving optical modulators. In one aspect, a driver includes a first circuit having a first switch coupled between a first input and a first output and a second circuit having a second switch coupled between a second input and a second output. Each of the first and second switches is configured to receive a control signal adjustable to control a corresponding signal path with a corresponding input electronic signal. The first and second circuits are configured to control a rising edge and a falling edge of an output electronic signal at an output of the driver that is based on a first output electronic signal at the first output and a second output electronic signal at the second output. The output of the driver is electrically coupled to the optical modulator to provide the output electronic signal to modulate an optical signal.

Abstract: Methods, devices, and systems for driving optical modulators. In one aspect, a driver includes a first circuit having a first switch coupled between a first input and a first output and a second circuit having a second switch coupled between a second input and a second output. Each of the first and second switches is configured to receive a control signal adjustable to control a corresponding signal path with a corresponding input electronic signal. The first and second circuits are configured to control a rising edge and a falling edge of an output electronic signal at an output of the driver that is based on a first output electronic signal at the first output and a second output electronic signal at the second output. The output of the driver is electrically coupled to the optical modulator to provide the output electronic signal to modulate an optical signal.

Abstract: A system-in-package includes: a photonic integrated circuit (PIC) including an active photonic component; and an electronic integrated circuit (EIC) stacked on the PIC, the EIC including: an electrical component electrically connected to a landing pad, and a copper pillar embedded in the landing pad and protruding from the landing pad that connects with the active photonic component such that the electrical component is electrically connected to the active photonic component. The landing pad has a larger surface area than a cross sectional area of the copper pillar, and wherein, when viewed from the EIC towards the PIC, the active photonic component on the PIC is offset from the landing pad of the EIC, wherein the offset is sufficient to keep a parasitic capacitance between the landing pad and the active photonic component within a pre-determined threshold level of tolerance.

Abstract: A system-in-package includes: a photonic integrated circuit (PIC) including an active photonic component; and an electronic integrated circuit (EIC) stacked on the PIC, the EIC including: an electrical component electrically connected to a landing pad, and a copper pillar embedded in the landing pad and protruding from the landing pad that connects with the active photonic component such that the electrical component is electrically connected to the active photonic component. The landing pad has a larger surface area than a cross sectional area of the copper pillar, and wherein, when viewed from the EIC towards the PIC, the active photonic component on the PIC is offset from the landing pad of the EIC, wherein the offset is sufficient to keep a parasitic capacitance between the landing pad and the active photonic component within a pre-determined threshold level of tolerance.

Abstract: A system-in-package includes: a photonic integrated circuit (PIC) including an active photonic component; and an electronic integrated circuit (EIC) stacked on the PIC, the EIC including: an electrical component electrically connected to a landing pad, and a copper pillar embedded in the landing pad and protruding from the landing pad that connects with the active photonic component such that the electrical component is electrically connected to the active photonic component. The landing pad has a larger surface area than a cross sectional area of the copper pillar, and wherein, when viewed from the EIC towards the PIC, the active photonic component on the PIC is offset from the landing pad of the EIC, wherein the offset is sufficient to keep a parasitic capacitance between the landing pad and the active photonic component within a pre-determined threshold level of tolerance.

Abstract: A system-in-package includes: a photonic integrated circuit (PIC) including an active photonic component; and an electronic integrated circuit (EIC) stacked on the PIC, the EIC including: an electrical component electrically connected to a landing pad, and a copper pillar embedded in the landing pad and protruding from the landing pad that connects with the active photonic component such that the electrical component is electrically connected to the active photonic component. The landing pad has a larger surface area than a cross sectional area of the copper pillar, and wherein, when viewed from the EIC towards the PIC, the active photonic component on the PIC is offset from the landing pad of the EIC, wherein the offset is sufficient to keep a parasitic capacitance between the landing pad and the active photonic component within a pre-determined threshold level of tolerance.

Abstract: A latency processing system detects traffic at a cloud service end point and analyzes packets in the detected traffic to identify a network configuration of a client that is accessing the cloud service. Latency components corresponding to different parts of the network configuration are identified and quantified. A recommendation engine is controlled to generate and surface an output indicative of recommendations for reducing network latency.

Abstract: The present application describes a detect, alert and recovery system for various cloud-based and/or network-based services. The detect, alert and recovery system receives network performance data associated with a particular namespace from various network information sources. The network performance data may be aggregated based on various scopes. The aggregated data is then analyzed to determine whether an anomaly exists. If an anomaly exists, the detect, alert and recovery system may cause the performance of various actions in order to address the anomaly.

Abstract: An integrated electrostatic discharge (ESD) protection circuitry for a signal electrode. Coupled in shunt between the signal electrode and the positive and negative power supply electrodes are opposing sets of multiple diodes coupled in series. Each set includes a diode across which is applied a nominal reverse bias voltage. These opposing reverse bias voltages are maintained at substantially constant predetermined nominal magnitudes in relation to the voltage at the signal electrode, thereby ensuring minimal leakage current via the signal electrode over the full dynamic range of the signal.

Abstract: An operational amplifier in accordance with one embodiment of the invention includes folded cascode transistors and a self-biased common-mode feedback circuit coupled to the folded cascode transistors. The operational amplifier can include an output stage coupled to the self-biased common-mode feedback circuit and the folded cascode transistors.

Abstract: An integrated electrostatic discharge (ESD) protection circuitry for a signal electrode. Coupled in shunt between the signal electrode and the positive and negative power supply electrodes are opposing sets of multiple diodes coupled in series. Each set includes a diode across which is applied a nominal reverse bias voltage These opposing reverse bias voltages are maintained at substantially constant predetermined nominal magnitudes in relation to the voltage at the signal electrode, thereby ensuring minimal leakage current via the signal electrode over the full dynamic range of the signal.