Patents by Inventor Saurabh Vinayak Suryavanshi

Saurabh Vinayak Suryavanshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220328651
    Abstract: A device stack for an electronic memory or other device includes a substrate and first and second layers of insulating material. The first layer of insulating material is supported by the substrate. A semiconducting ferroelectric layer is positioned and electrically isolated between the first and second layers of insulating material. A stress layer capable of converting a ferroelectric or semiconductor material into a semiconducting ferroelectric material can be positioned in contact with the semiconducting ferroelectric layer. In some embodiments, the device is a Metal-Insulator-FeS-Insulator-Semiconductor (MIFIS) device that allows for controlled switching of the semiconducting ferroelectric (FeS) layer between various polarization states. Switching polarization states is enabled by application of an electric field by a semiconducting electrode.
    Type: Application
    Filed: April 7, 2022
    Publication date: October 13, 2022
    Inventors: Saurabh Vinayak Suryavanshi, Lucian Shifren, Carlos A. Paz de Araujo, Jolanta B. Celinska
  • Patent number: 11258010
    Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) such as in a CEM device capable of switching between and/or among impedance states. In particular embodiments, a CEM may be formed from one or more transition metal oxides (TMOs), one or more post transition metal oxides (PTMOs) or one or more post transition metal chalcogenides (PTMCs), or a combination thereof.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: February 22, 2022
    Assignee: Cerfe Labs, Inc.
    Inventors: Carlos Alberto Paz de Araujo, Saurabh Vinayak Suryavanshi, Lucian Shifren, Jolanta Bozena Celinska
  • Patent number: 11133466
    Abstract: Methods are disclosed herein for controlling the switching characteristics of correlated electron material (CEM) switching devices. The methods comprise one or more of controlling a density of grain boundaries in the CEM layer, controlling an open pore porosity in the CEM layer and controlling a surface area of exposed surfaces of the CEM layer during the fabrication of the CEM switching devices.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: September 28, 2021
    Assignee: Cerfe Labs, Inc.
    Inventors: Saurabh Vinayak Suryavanshi, Lucian Shifren, Carlos Alberto Paz de Araujo, Jolanta Bozena Celinska
  • Publication number: 20210083186
    Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) such as in a CEM device capable of switching between and/or among impedance states. In particular embodiments, a CEM may be formed from one or more transition metal oxides (TMOs), one or more post transition metal oxides (PTMOs) or one or more post transition metal chalcogenides (PTMCs), or a combination thereof.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 18, 2021
    Inventors: Carlos Alberto Paz de Araujo, Saurabh Vinayak Suryavanshi, Lucian Shifren, Jolanta Bozena Celinska
  • Publication number: 20200295260
    Abstract: Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) device. Layers of a CEM to form a correlated electron switch (CES) device may be disposed between layers of electrode material. In an embodiment, one or more techniques may be employed to remove and/or neutralize parasitic features and/or devices introduced during manufacture of the CEM device.
    Type: Application
    Filed: April 16, 2020
    Publication date: September 17, 2020
    Inventors: Xueming Huang, Ming He, Marinela Barci, Paul Raymond Besser, Saurabh Vinayak Suryavanshi, Lucian Shifren
  • Publication number: 20200227515
    Abstract: Briefly, embodiments of claimed subject matter relate to devices and methods for formation of ferroelectric materials utilizing transition metals, transition metal oxides, post transition metals, and/or post transition metal oxides, which may be doped with bismuth (Bi) in a concentration of between about 0.001% to about 25.0%. Alternatively, a dopant may include bismuth oxide (Bi2O3) or may include bismuth aluminum oxide ((BixAl1?x)2O3). In particular embodiments, such utilization of bismuth and/or related dopants may bring about stabilization of relatively thin ferroelectric devices.
    Type: Application
    Filed: January 15, 2019
    Publication date: July 16, 2020
    Inventors: Lucian Shifren, Carlos Alberto Paz de Araujo, Jolanta Bozena Celinska, Saurabh Vinayak Suryavanshi