Abstract: In some examples, an apparatus includes a constant amplitude ramp generator having a differential output and first and second generator inputs, in which the first generator input is coupled to a power terminal. The apparatus also includes an input voltage feed-forward circuit having a feed-forward input and a feed-forward output, in which the feed-forward input is coupled to an input voltage terminal, and the feed-forward output is coupled to the second generator input.

Abstract: Systems, methods, and instrumentalities are described herein for calculating local illumination compensation (LIC) parameters for bi-predicted coding unit (CU). The LIC parameters may be used to generate adjusted samples for the current CU and to address local illumination changes that may exist among temporal neighboring pictures. LIC parameters may be calculated based on bi-predicted reference template samples and template samples for a current CU. Bi-predicted reference template samples may be generated based on reference template samples neighboring temporal reference CUs. For example, the bi-predicted reference template samples may be generated based on averaging the reference template samples. The reference template samples may correspond to template samples for the current CU. A CU may be or may include a coding block and/or a sub-block that may be derived by dividing the coding block.

Abstract: Procedures, methods, architectures, apparatuses, systems, devices, and computer program products directed to improved linear model estimation for template-based video coding are provided. Included therein is a method comprising determining minimum and maximum (“min/max”) values of luma and chroma samples neighboring a coding block, wherein the min/max chroma values correspond to the min/max luma values; determining a first linear model parameter of a template-based video coding technique (i) based on a single look-up table and the min/max chroma values and (ii) at a precision no greater than 16 bits; determining a second linear model parameter of the template-based video coding technique (i) based on the first linear model parameter and the minimum chroma and luma values and (ii) at a precision no greater than 16 bits; and predicting chroma samples of the coding block based on reconstructed luma samples of the coding block and the first and second linear model parameters.

Abstract: A current sense circuit includes a sense amplifier, a current mirror circuit, a resistor, a low-pass filter, and a capacitor. The sense amplifier is adapted to be coupled to a switching transistor of a DC-DC converter. The current mirror circuit is coupled to the sense amplifier, and is configured to generate a sense current proportional to a current flowing through the switching transistor. The resistor is coupled to the current mirror circuit, and is configured to generate a sense voltage based on the sense current. The low-pass filter is coupled to the resistor, and is configured to average the sense voltage over an averaging interval. The capacitor is coupled to the resistor, and is configured to store the sense voltage in a blanking interval that precedes the averaging interval, and provide a compensation current in the averaging interval.

Abstract: Embodiments include systems, methods, and apparatuses for controlling off-time during a burst mode in an LLC converter. In one embodiment, a circuit comprises an LLC converter having a primary side and a burst mode controller, the burst mode controller configured to monitor, on the primary side of the LLC converter, electrical current, and in response to a determination that the electrical current is below a first threshold, increase an off-time for switches in the LLC converter and in response to a determination that the electrical current is above a second threshold that is higher than the first threshold, decrease the off-time for the switches in the LLC converter.

Abstract: Methods and apparatus to provide an adaptive gate driver for switching devices are disclosed. An example apparatus includes an electrical switch to drive an electrical system; a condition characterizer to select a drive strength based on a first system parameter corresponding to the electrical system, the first system parameter including at least one of an input voltage corresponding to the electrical switch, an output current corresponding to the electrical switch, or a process variation of the electrical switch; and a driver to generate an output having a current corresponding to the selected drive strength.

Abstract: In described examples of a ramp circuit, a first terminal of a capacitor is coupled to a ramp terminal and a second capacitor terminal is coupled to a return terminal. A charge source has an input terminal coupled to a supply terminal and a charge output terminal. A resistor has a first terminal coupled to the return terminal. A first switch is coupled between the ramp terminal and a second terminal of the resistor. A second switch is coupled between the charge output terminal and the ramp terminal.

Abstract: A switch-mode power supply circuit includes a low-side switching transistor, a high-side switching transistor, a low-side current sensing circuit, and a gate driver circuit. The low-side current sensing circuit is coupled to the low-side switching transistor and is configured to sense a current flowing through the low-side switching transistor. The gate driver circuit is coupled to the low-side current sensing circuit and the high-side switching transistor. The gate driver circuit is configured to generate a signal having a first drive strength to switch the high-side switching transistor based on current flowing through the low-side switching transistor being less than a threshold current, and to generate a signal having a second drive strength to switch the high-side switching transistor based on current flowing through the low-side switching transistor being greater than the threshold current. The first drive strength is greater than the second drive strength.

Abstract: Apparatus and methods for implementing a real-time Versatile Video Coding (VVC) decoder use multiple threads to address the limitation with existing parallelization techniques and fully utilizes the available CPU computation resource without compromising on the coding efficiency. The proposed Multi-threaded (MT) framework uses CTU level parallel processing techniques without compromising on the memory bandwidth. Picture level parallel processing separates the sequence into temporal levels by considering the picture's referencing hierarchy. Embodiments are provided using various optimization techniques to achieve real-time VVC decoding on heterogenous platforms with multi-core CPUs, for those bitstreams generated using a VVC reference encoder with a default configuration.

Abstract: In some examples, a system includes a voltage source terminal, a voltage reference terminal, a field effect transistor (FET), a current source, a comparator, and adjustment circuitry. The FET has a gate terminal and a non-gate terminal, the gate terminal coupled to the voltage source terminal. The current source is coupled to the non-gate terminal. The comparator has a comparator output and first and second comparator inputs, the first comparator input coupled to the non-gate terminal, and the second comparator input coupled to the voltage reference terminal. The adjustment circuitry has a circuitry input and a circuitry output, the circuitry input coupled to the comparator output, and the adjustment circuitry configured to adjust the circuitry output responsive to the circuitry input, in which the adjustment reduces a drive strength of the circuit.

Abstract: A current sense circuit includes a sense amplifier, a current mirror circuit, a resistor, a low-pass filter, and a capacitor. The sense amplifier is adapted to be coupled to a switching transistor of a DC-DC converter. The current mirror circuit is coupled to the sense amplifier, and is configured to generate a sense current proportional to a current flowing through the switching transistor. The resistor is coupled to the current mirror circuit, and is configured to generate a sense voltage based on the sense current. The low-pass filter is coupled to the resistor, and is configured to average the sense voltage over an averaging interval. The capacitor is coupled to the resistor, and is configured to store the sense voltage in a blanking interval that precedes the averaging interval, and provide a compensation current in the averaging interval.

Abstract: Systems, methods, and instrumentalities are described herein for calculating local illumination compensation (LIC) parameters for bi-predicted coding unit (CU). The LIC parameters may be used to generate adjusted samples for the current CU and to address local illumination changes that may exist among temporal neighboring pictures. LIC parameters may be calculated based on bi-predicted reference template samples and template samples for a current CU. Bi-predicted reference template samples may be generated based on reference template samples neighboring temporal reference CUs. For example, the bi-predicted reference template samples may be generated based on averaging the reference template samples. The reference template samples may correspond to template samples for the current CU. A CU may be or may include a coding block and/or a sub-block that may be derived by dividing the coding block.

Abstract: Systems, methods, and Instrumentalities are described herein for calculating local Illumination compensation (LIC) parameters for bi-predicted coding unit (CU). The LIC parameters may be used to generate adjusted samples for the current CU and to address local illumination changes that may exist among temporal neighboring pictures. LIC parameters may be calculated based on bi-predicted reference template samples and template samples for a current CU. Bi-predicted reference template samples may be generated based on reference template samples neighboring temporal reference CUs. For example, the bi-predicted reference template samples may be generated based on averaging the reference template samples. The reference template samples may correspond to template samples for the current CU. A CU may be or may include a coding block and/or a sub-block that may be derived by dividing the coding block.

Abstract: Procedures, methods, architectures, apparatuses, systems, devices, and computer program products directed to improved linear model estimation for template-based video coding are provided. Included therein is a method comprising determining minimum and maximum (“min/max”) values of luma and chroma samples neighboring a coding block, wherein the min/max chroma values correspond to the min/max luma values; determining a first linear model parameter of a template-based video coding technique (i) based on a single look-up table and the min/max chroma values and (ii) at a precision no greater than 16 bits; determining a second linear model parameter of the template-based video coding technique (i) based on the first linear model parameter and the minimum chroma and luma values and (ii) at a precision no greater than 16 bits; and predicting chroma samples of the coding block based on reconstructed luma samples of the coding block and the first and second linear model parameters.

Abstract: In a described example, an apparatus includes a first switch coupled between a terminal for receiving an input voltage and a top plate node, and having a first control terminal; a second switch coupled between the top plate node and a switching node, and having a second control terminal; a third switch coupled between the switching node and a bottom plate node and having a third control terminal; a fourth switch coupled between the bottom plate node and a ground terminal, and having a fourth control terminal; a flying capacitor coupled between the top plate node and the bottom plate node; a fifth switch coupled between the top plate node and an auxiliary node; a sixth switch coupled between the auxiliary node and the bottom plate node; and an auxiliary capacitor coupled between the auxiliary control terminal and a ground terminal.

Abstract: Embodiments include systems, methods, and apparatuses for controlling off-time during a burst mode in an LLC converter. In one embodiment, a circuit comprises an LLC converter having a primary side and a burst mode controller, the burst mode controller configured to monitor, on the primary side of the LLC converter, electrical current, and in response to a determination that the electrical current is below a first threshold, increase an off-time for switches in the LLC converter and in response to a determination that the electrical current is above a second threshold that is higher than the first threshold, decrease the off-time for the switches in the LLC converter.

Abstract: Embodiments include systems, methods, and apparatuses for controlling off-time during a burst mode in an LLC converter. In one embodiment, a circuit comprises an LLC converter having a primary side and a burst mode controller, the burst mode controller configured to monitor, on the primary side of the LLC converter, electrical current, and in response to a determination that the electrical current is below a first threshold, increase an off-time for switches in the LLC converter and in response to a determination that the electrical current is above a second threshold that is higher than the first threshold, decrease the off-time for the switches in the LLC converter.

Abstract: A circuit includes a first transistor and a second transistor coupled to the first transistor at a switch node and to a ground node. An estimator circuit receives a first signal to control an on and off state of the first transistor. The estimator circuit generates a second signal to control the on and off state of the second transistor. The second signal has a pulse width based on a pulse width of the first signal. A clocked comparator includes a clock input, a first input, and a second input. The first input receives a voltage indicative of a voltage of the switch node. The second input is coupled to a ground node. The clock input receives a third signal indicative of the second signal. The clocked comparator generates a comparator output signal. The estimator circuit adjusts the pulse width of the second signal based on the comparator output signal.

Abstract: A switch-mode power supply circuit includes a low-side switching transistor, a high-side switching transistor, a low-side current sensing circuit, and a gate driver circuit. The low-side current sensing circuit is coupled to the low-side switching transistor and is configured to sense a current flowing through the low-side switching transistor. The gate driver circuit is coupled to the low-side current sensing circuit and the high-side switching transistor. The gate driver circuit is configured to generate a signal having a first drive strength to switch the high-side switching transistor based on current flowing through the low-side switching transistor being less than a threshold current, and to generate a signal having a second drive strength to switch the high-side switching transistor based on current flowing through the low-side switching transistor being greater than the threshold current. The first drive strength is greater than the second drive strength.

Abstract: In some examples, a system includes a voltage source terminal, a voltage reference terminal, a field effect transistor (FET), a current source, a comparator, and adjustment circuitry. The FET has a gate terminal and a non-gate terminal, the gate terminal coupled to the voltage source terminal. The current source is coupled to the non-gate terminal. The comparator has a comparator output and first and second comparator inputs, the first comparator input coupled to the non-gate terminal, and the second comparator input coupled to the voltage reference terminal. The adjustment circuitry has a circuitry input and a circuitry output, the circuitry input coupled to the comparator output, and the adjustment circuitry configured to adjust the circuitry output responsive to the circuitry input, in which the adjustment reduces a drive strength of the circuit.