Patents by Inventor Sauresh BHOWMICK

Sauresh BHOWMICK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11556406
    Abstract: The independent claims of this patent signify a concise description of embodiments. An automatic process for determining and/or predicting the original root-cause(s) of a violation is proposed using two major enhancements on top of the current VC-Static solution. First, an information repository is created by mining various Static checker components' analysis information, and second, an analysis framework is created which systematically prunes the above-mentioned information repository to find the actual root cause(s) of the violation. This Abstract is not intended to limit the scope of the claims.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: January 17, 2023
    Assignee: Synopsys, Inc.
    Inventors: Aditya Daga, Sauresh Bhowmick, Bhaskar Pal, Rajarshi Mukherjee
  • Patent number: 11288427
    Abstract: Disclosed herein are system, method, and computer-readable storage device embodiments for implementing automated root-cause analysis for static verification. An embodiment includes a system with memory and processor(s) configured to receive a report comprising violations and debug fields, and accept a selection of a seed debug field from among the plurality of debug fields. Clone violations may be generated by calculating an overlay of a given violation of the violations and a seed debug field, yielding possible values for a subset of debug fields. A clone violation may be created for a combination of the at least two second debug fields, populating a projection matrix, which may be used to map violations and clone violations to corresponding numerical values in the projection matrix and determine a violation cluster based on the mapping having corresponding numerical values and score(s) satisfying a threshold, via ML. Clustering may further be used to generate visualizations.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: March 29, 2022
    Assignee: Synopsys, Inc.
    Inventors: Sauresh Bhowmick, Sanjay Gulati, Sourasis Das, Bhaskar Pal, Rajarshi Mukherjee
  • Patent number: 10990735
    Abstract: A system and method generates cluster-based power architecture interfaces for an integrated circuit (IC) design under test (DUT) debugging by receiving design data for an IC DUT, determining power characteristic data for the IC DUT, generating display components within a graphical user interface (GUI) corresponding to individual components encompassed within a power intent hierarchy corresponding with the IC DUT, generating graphical links between displayed components, overlaying interactive elements corresponding with generated violation clusters over graphical links, and providing root-cause interactive elements within the generated GUI having visual associations with the interactive components corresponding with particular violation clusters.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: April 27, 2021
    Assignee: SYNOPSYS, INC.
    Inventors: Sauresh Bhowmick, Bhaskar Pal, Esha Dutta, Harsha Vardhan
  • Publication number: 20200372196
    Abstract: A system and method generates cluster-based power architecture interfaces for an integrated circuit (IC) design under test (DUT) debugging by receiving design data for an IC DUT, determining power characteristic data for the IC DUT, generating display components within a graphical user interface (GUI) corresponding to individual components encompassed within a power intent hierarchy corresponding with the IC DUT, generating graphical links between displayed components, overlaying interactive elements corresponding with generated violation clusters over graphical links, and providing root-cause interactive elements within the generated GUI having visual associations with the interactive components corresponding with particular violation clusters.
    Type: Application
    Filed: May 25, 2020
    Publication date: November 26, 2020
    Inventors: Sauresh Bhowmick, Bhaskar Pal, Esha Dutta, Harsha Vardhan
  • Publication number: 20200349311
    Abstract: Disclosed herein are system, method, and computer-readable storage device embodiments for implementing automated root-cause analysis for static verification. An embodiment includes a system with memory and processor(s) configured to receive a report comprising violations and debug fields, and accept a selection of a seed debug field from among the plurality of debug fields. Clone violations may be generated by calculating an overlay of a given violation of the violations and a seed debug field, yielding possible values for a subset of debug fields. A clone violation may be created for a combination of the at least two second debug fields, populating a projection matrix, which may be used to map violations and clone violations to corresponding numerical values in the projection matrix and determine a violation cluster based on the mapping having corresponding numerical values and score(s) satisfying a threshold, via ML. Clustering may further be used to generate visualizations.
    Type: Application
    Filed: March 10, 2020
    Publication date: November 5, 2020
    Inventors: Sauresh BHOWMICK, Sanjay GULATI, Sourasis DAS, Bhaskar PAL, Rajarshi MUKHERJEE
  • Publication number: 20200174871
    Abstract: The independent claims of this patent signify a concise description of embodiments. An automatic process for determining and/or predicting the original root-cause(s) of a violation is proposed using two major enhancements on top of the current VC-Static solution. First, an information repository is created by mining various Static checker components' analysis information, and second, an analysis framework is created which systematically prunes the above-mentioned information repository to find the actual root cause(s) of the violation. This Abstract is not intended to limit the scope of the claims.
    Type: Application
    Filed: December 2, 2019
    Publication date: June 4, 2020
    Inventors: Aditya Daga, Sauresh Bhowmick, Bhaskar Pal, Rajarshi Mukherjee
  • Patent number: 10586001
    Abstract: Disclosed herein are system, method, and computer-readable storage device embodiments for implementing automated root-cause analysis for static verification. An embodiment includes a system with memory and processor(s) configured to receive a report comprising violations and debug fields, and accept a selection of a seed debug field from among the plurality of debug fields. Clone violations may be generated by calculating an overlay of a given violation of the violations and a seed debug field, yielding possible values for a subset of debug fields. A clone violation may be created for a combination of the at least two second debug fields, populating a projection matrix, which may be used to map violations and clone violations to corresponding numerical values in the projection matrix and determine a violation cluster based on the mapping having corresponding numerical values and score(s) satisfying a threshold, via ML. Clustering may further be used to generate visualizations.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: March 10, 2020
    Assignee: Synopsys, Inc.
    Inventors: Sauresh Bhowmick, Sanjay Gulati, Sourasis Das, Bhaskar Pal, Rajarshi Mukherjee
  • Publication number: 20190213288
    Abstract: Disclosed herein are system, method, and computer-readable storage device embodiments for implementing automated root-cause analysis for static verification. An embodiment includes a system with memory and processor(s) configured to receive a report comprising violations and debug fields, and accept a selection of a seed debug field from among the plurality of debug fields. Clone violations may be generated by calculating an overlay of a given violation of the violations and a seed debug field, yielding possible values for a subset of debug fields. A clone violation may be created for a combination of the at least two second debug fields, populating a projection matrix, which may be used to map violations and clone violations to corresponding numerical values in the projection matrix and determine a violation cluster based on the mapping having corresponding numerical values and score(s) satisfying a threshold, via ML. Clustering may further be used to generate visualizations.
    Type: Application
    Filed: January 8, 2019
    Publication date: July 11, 2019
    Inventors: Sauresh BHOWMICK, Sanjay GULATI, Sourasis DAS, Bhaskar PAL, Rajarshi MUKHERJEE