Patents by Inventor Schubert Chu
Schubert Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240200188Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.Type: ApplicationFiled: February 28, 2024Publication date: June 20, 2024Applicant: Applied Materials, Inc.Inventors: Feng Q. Liu, Hua Chung, Schubert Chu, Mei Chang, Jeffrey W. Anthis, David Thompson
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Patent number: 12015042Abstract: A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.Type: GrantFiled: February 21, 2020Date of Patent: June 18, 2024Assignee: Applied Materials, Inc.Inventors: Papo Chen, Schubert Chu, Errol Antonio C Sanchez, John Timothy Boland, Zhiyuan Ye, Lori Washington, Xianzhi Tao, Yi-Chiau Huang, Chen-Ying Wu
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Patent number: 11946135Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.Type: GrantFiled: March 27, 2023Date of Patent: April 2, 2024Assignee: Applied Materials, Inc.Inventors: Feng Q. Liu, Hua Chung, Schubert Chu, Mei Chang, Jeffrey W. Anthis, David Thompson
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Publication number: 20240026522Abstract: Embodiments disclosed herein generally provide improved control of gas flow in processing chambers. In at least one embodiment, a liner for a processing chamber includes an annular body having a sidewall and a vent formed in the annular body for exhausting gas from inside to outside the annular body. The vent comprises one or more vent holes disposed through the sidewall. The liner further includes an opening in the annular body for substrate loading and unloading.Type: ApplicationFiled: October 2, 2023Publication date: January 25, 2024Inventors: Zhepeng CONG, Schubert CHU, Nyi Oo MYO, Kartik Bhupendra SHAH, Zhiyuan YE, Richard O. COLLINS
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Patent number: 11781212Abstract: Embodiments disclosed herein generally provide improved control of gas flow in processing chambers. In at least one embodiment, a liner for a processing chamber includes an annular body having a sidewall and a vent formed in the annular body for exhausting gas from inside to outside the annular body. The vent comprises one or more vent holes disposed through the sidewall. The liner further includes an opening in the annular body for substrate loading and unloading.Type: GrantFiled: April 7, 2021Date of Patent: October 10, 2023Assignee: Applied Material, Inc.Inventors: Zhepeng Cong, Schubert Chu, Nyi Oo Myo, Kartik Bhupendra Shah, Zhiyuan Ye, Richard O. Collins
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Publication number: 20230243068Abstract: Embodiments generally relate to methods for depositing silicon-phosphorous materials, and more specifically, relate to using silicon-phosphorous compounds in vapor deposition processes (e.g., epitaxy, CVD, or ALD) to deposit silicon-phosphorous materials. In one or more embodiments, a method for forming a silicon-phosphorous material on a substrate is provided and includes exposing the substrate to a deposition gas containing one or more silicon-phosphorous compounds during a deposition process and depositing a film containing the silicon-phosphorous material on the substrate. The silicon-phosphorous compound has the chemical formula [(R3-vHvSi)—(R2-wHwSi)n]xPHyR?z, where each instance of R and each instance of R? are independently an alkyl or a halogen, n is 0, 1, or 2; v is 0, 1, 2, or 3; w is 0, 1, or 2; x is 1, 2, or 3; y is 0, 1, or 2; z is 0, 1, or 2, and where x+y+z=3.Type: ApplicationFiled: April 5, 2023Publication date: August 3, 2023Inventors: Errol Antonio C. SANCHEZ, Mark J. SALY, Schubert CHU, Abhishek DUBE, Srividya NATARAJAN
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Publication number: 20230227968Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.Type: ApplicationFiled: March 27, 2023Publication date: July 20, 2023Applicant: Applied Materials, Inc.Inventors: Feng Q. Liu, Hua Chung, Schubert Chu, Mei Chang, Jeffrey W. Anthis, David Thompson
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Patent number: 11649560Abstract: Embodiments generally relate to methods for depositing silicon-phosphorous materials, and more specifically, relate to using silicon-phosphorous compounds in vapor deposition processes (e.g., epitaxy, CVD, or ALD) to deposit silicon-phosphorous materials. In one or more embodiments, a method for forming a silicon-phosphorous material on a substrate is provided and includes exposing the substrate to a deposition gas containing one or more silicon-phosphorous compounds during a deposition process and depositing a film containing the silicon-phosphorous material on the substrate. The silicon-phosphorous compound has the chemical formula [(R3-vHvSi)—(R2-wHwSi)n]xPHyR?z, where each instance of R and each instance of R? are independently an alkyl or a halogen, n is 0, 1, or 2; v is 0, 1, 2, or 3; w is 0, 1, or 2; x is 1, 2, or 3; y is 0, 1, or 2; z is 0, 1, or 2, and where x+y+z=3.Type: GrantFiled: August 2, 2019Date of Patent: May 16, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Errol Antonio C Sanchez, Mark J. Saly, Schubert Chu, Abhishek Dube, Srividya Natarajan
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Patent number: 11643721Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.Type: GrantFiled: September 12, 2018Date of Patent: May 9, 2023Assignee: Applied Materials, Inc.Inventors: Feng Q. Liu, Hua Chung, Schubert Chu, Mei Chang, Jeffrey W. Anthis, David Thompson
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Patent number: 11615986Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.Type: GrantFiled: September 17, 2021Date of Patent: March 28, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Xuebin Li, Wei Liu, Gaurav Thareja, Shashank Sharma, Patricia M. Liu, Schubert Chu
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Publication number: 20220325400Abstract: Embodiments disclosed herein generally provide improved control of gas flow in processing chambers. In at least one embodiment, a liner for a processing chamber includes an annular body having a sidewall and a vent formed in the annular body for exhausting gas from inside to outside the annular body. The vent comprises one or more vent holes disposed through the sidewall. The liner further includes an opening in the annular body for substrate loading and unloading.Type: ApplicationFiled: April 7, 2021Publication date: October 13, 2022Inventors: Zhepeng CONG, Schubert CHU, Nyi Oo MYO, Karlik Bhupendra SHAH, Zhiyuan YE, Richard O. COLLINS
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Publication number: 20220005704Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.Type: ApplicationFiled: September 17, 2021Publication date: January 6, 2022Inventors: Xuebin LI, Wei LIU, Gaurav THAREJA, Shashank SHARMA, Patricia M. LIU, Schubert CHU
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Publication number: 20220005705Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.Type: ApplicationFiled: September 17, 2021Publication date: January 6, 2022Inventors: Xuebin LI, Wei LIU, Gaurav THAREJA, Shashank SHARMA, Patricia M. LIU, Schubert CHU
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Patent number: 11189508Abstract: Embodiments described herein generally relate to an in-situ metrology system that can constantly provide an uninterrupted optical access to a substrate disposed within a process chamber. In one embodiment, a metrology system for a substrate processing chamber is provided. The metrology system includes a sensor view pipe coupling to a quartz dome of a substrate processing chamber, a flange extending radially from an outer surface of the sensor view pipe, and a viewport window disposed on the flange, the viewport window having spectral ranges chosen for an optical sensor that is disposed on or adjacent to the viewport window.Type: GrantFiled: September 24, 2019Date of Patent: November 30, 2021Assignee: Applied Materials, Inc.Inventors: Ji-Dih Hu, Brian H. Burrows, Janardhan Devrajan, Schubert Chu
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Patent number: 11152221Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.Type: GrantFiled: February 7, 2020Date of Patent: October 19, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Xuebin Li, Wei Liu, Gaurav Thareja, Shashank Sharma, Patricia M. Liu, Schubert Chu
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Patent number: 11124874Abstract: Methods for depositing one or more iridium materials on a surface of a substrate are provided. A method for forming the iridium material (e.g., metallic iridium and/or iridium silicide) on the substrate can include sequentially exposing the substrate to an iridium precursor and a reducing agent during an atomic layer deposition (ALD) process within a process chamber and depositing the iridium material on the substrate. In some examples, the reducing agent can be or include hydrogen gas (H2), a hydrogen plasma, atomic hydrogen, hydrazine or derivatives thereof, or any combination thereof and the deposited iridium material is metallic iridium. In other examples, the reducing agent contains one or more silicon precursors and the iridium material is an iridium silicide.Type: GrantFiled: September 5, 2019Date of Patent: September 21, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Hua Chung, Feng Q. Liu, Schubert Chu
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Publication number: 20210265416Abstract: A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.Type: ApplicationFiled: February 21, 2020Publication date: August 26, 2021Inventors: Papo CHEN, Schubert CHU, Errol Antonio C SANCHEZ, John Timothy BOLAND, Zhiyuan YE, Lori WASHINGTON, Xianzhi TAO, Yi-Chiau HUANG, Chen-Ying WU
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Patent number: 11021790Abstract: Embodiments herein relate to chamber liners with a multi-piece design for use in processing chambers. The multi-piece design can have an inner portion and an outer portion. A portion of the inner surface of the outer portion may be designed to be in contact with the outer surface of the inner portion at a single junction point, creating a thermal barrier between the inner portion and outer portion, thus reducing heat transfer from the inner portion and outer portion. The thermal barrier creates higher temperatures at the chamber liner inner surface and therefore leads to shorter heat up times within the chamber. Additionally, the thermal barrier also creates lower temperatures near the base ring and outer surface of the outer ring, thereby protecting the chamber walls and requiring less thermal regulation/dissipation at the chamber walls.Type: GrantFiled: July 25, 2019Date of Patent: June 1, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Zhepeng Cong, Schubert Chu, Nyi O. Myo, Kartik Shah, Surajit Kumar
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Publication number: 20200399784Abstract: Embodiments generally relate to methods for depositing silicon-phosphorous materials, and more specifically, relate to using silicon-phosphorous compounds in vapor deposition processes (e.g., epitaxy, CVD, or ALD) to deposit silicon-phosphorous materials. In one or more embodiments, a method for forming a silicon-phosphorous material on a substrate is provided and includes exposing the substrate to a deposition gas containing one or more silicon-phosphorous compounds during a deposition process and depositing a film containing the silicon-phosphorous material on the substrate. The silicon-phosphorous compound has the chemical formula [(R3-vHvSi)—(R2-wHwSi)n]xPHyR?z, where each instance of R and each instance of R? are independently an alkyl or a halogen, n is 0, 1, or 2; v is 0, 1, 2, or 3; w is 0, 1, or 2; x is 1, 2, or 3; y is 0, 1, or 2; z is 0, 1, or 2, and where x+y+z=3.Type: ApplicationFiled: August 2, 2019Publication date: December 24, 2020Inventors: Errol Antonio C Sanchez, Mark J. Saly, Schubert Chu, Abhishek Dube, Srividya Natarajan
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Publication number: 20200266068Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.Type: ApplicationFiled: February 7, 2020Publication date: August 20, 2020Inventors: Xuebin LI, Wei LIU, Gaurav THAREJA, Shashank SHARMA, Patricia M. LIU, Schubert CHU