Abstract: A computer-implemented method for computer-implemented method for communicating completion of synchronous input/output (I/O) commands between a processor executing an operating system and a recipient control unit is described. The method may include issuing, by a processor, a Synchronous I/O command to the recipient control unit; receiving, with the processor, a DMA read request from the recipient control unit; converting, with the processor, the DMA read response to write a data record into memory of the recipient control unit; issuing the DMA read request to the recipient control unit, wherein the DMA read request comprises an echo read portion comprising at least one byte of information at the end of the data record written; receiving, by the processor, a DMA write confirmation comprising the echo read portion of the record; and writing the echo read portion to a status area.

Abstract: A computer-implemented method for synchronous input/output (I/O) cache line padding is described. The cache line padding occurs between a server having a processor executing an operating system and a recipient control unit. The method can include receiving, via the processor at the recipient control unit, a partial line direct memory access (DMA) write request; fetching, via the processor, a device table entry (DTE) associated with the partial line DMA write request; determining, via the processor, a cache line size for a synchronous input/output (I/O) cache line; and writing a full cache line DMA write request by padding, via the processor, the partial line DMA write request with a padded portion, where the padded portion is based on the cache line size.

Abstract: A storage controller determines a presence of an indication from an Input/Output (I/O) enclosure that the I/O enclosure will be powered off after a predetermined amount of time. The storage controller quiesces all I/O adapters of the I/O enclosure, in response to receiving the indication. The storage controller quiesces the I/O enclosure, in response to completion of quiescing of all of the I/O adapters of the I/O enclosure.

Abstract: A computer-implemented method for computer-implemented method for communicating completion of synchronous input/output (I/O) commands between a processor executing an operating system and a recipient control unit is described. The method may include issuing, by a processor, a Synchronous I/O command to the recipient control unit; receiving, with the processor, a DMA read request from the recipient control unit; converting, with the processor, the DMA read response to write a data record into memory of the recipient control unit; issuing the DMA read request to the recipient control unit, wherein the DMA read request comprises an echo read portion comprising at least one byte of information at the end of the data record written; receiving, by the processor, a DMA write confirmation comprising the echo read portion of the record; and writing the echo read portion to a status area.

Abstract: A computer-implemented method for synchronous input/output (I/O) cache line padding is described. The cache line padding occurs between a server having a processor executing an operating system and a recipient control unit. The method can include receiving, via the processor at the recipient control unit, a partial line direct memory access (DMA) write request; fetching, via the processor, a device table entry (DTE) associated with the partial line DMA write request; determining, via the processor, a cache line size for a synchronous input/output (I/O) cache line; and writing a full cache line DMA write request by padding, via the processor, the partial line DMA write request with a padded portion, where the padded portion is based on the cache line size.

Abstract: A storage controller determines a presence of an indication from an Input/Output (I/O) enclosure that the I/O enclosure will be powered off after a predetermined amount of time. The storage controller quiesces all I/O adapters of the I/O enclosure, in response to receiving the indication. The storage controller quiesces the I/O enclosure, in response to completion of quiescing of all of the I/O adapters of the I/O enclosure.

Abstract: A standby server, a first main server, and a second main server to control shared input/output (I/O) adapters in a storage system are provided. The standby server is in communication with the first main server and the second main server, and the storage system is configured to operate as a dual node active system. The standby server is activated in response to receiving a communication from the first main server of a fail mode of the second main server. Systems and physical computer storage media are also provided.

Abstract: A standby server, a first main server, and a second main server to control shared input/output (I/O) adapters in a storage system are provided. The standby server is in communication with the first main server and the second main server, and the storage system is configured to operate as a dual node active system. The standby server is activated in response to receiving a communication from the first main server of a fail mode of the second main server. Systems and physical computer storage media are also provided.

Abstract: Methods are provided in which a standby server, a first main server, and a second main server to control shared input/output (I/O) adapters in a storage system are provided. The standby server is in communication with the first main server and the second main server, and the storage system is configured to operate as a dual node active system. The methods include activating the standby server in response to receiving a communication from the first main server of a fail mode of the second main server. Systems and physical computer storage media are also provided.

Abstract: A sleep function capable of putting a fixed high-priority thread to sleep within a time-window is disclosed. After a sleep request has been made by a fixed high-priority thread via the sleep function, a determination is made whether or not the fixed high-priority thread is awoken before a requested sleep duration under the sleep request. If the fixed high-priority thread is awoken before the requested sleep duration, the number of tasks for the fixed high-priority thread to perform is increased in order to delay the start sleep time of the fixed high-priority thread from a point within a first time-window in which the sleep request was made to an end boundary of the first time-window.

Abstract: A sleep function capable of putting a fixed high-priority thread to sleep within a time-window is disclosed. After a sleep request has been made by a fixed high-priority thread via the sleep function, a determination is made whether or not the fixed high-priority thread is awoken before a requested sleep duration under the sleep request. If the fixed high-priority thread is awoken before the requested sleep duration, the number of tasks for the fixed high-priority thread to perform is increased in order to delay the start sleep time of the fixed high-priority thread from a point within a first time-window in which the sleep request was made to an end boundary of the first time-window.

Abstract: A machine and process for producing bags from roll stock of bag material are disclosed. The machine includes four subassemblies, a folding and cutting subassembly, a transport and first sewing subassembly and a second transport and sewing subassembly and a stacking subassembly. The folding and cutting subassembly, preferably includes a drum or reel with a plurality of peripheral clamps which are successively opened to receive the bag material and a blade positioned to force the bag material into an open clamp to define a fold. The adjacent closed clamp holding folded bag material tensions the bag material. A cutter severs adjacent folds between the adjacent clamps. Transfer and transport means are present to advance the folded cut bag blank past two sewing machines and then to the stacker subassembly.