Patents by Inventor Scott A. Estes
Scott A. Estes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170114382Abstract: Aspects of the present disclosure provide compositions and methods for increasing protein production in mammalian cells, e.g. methods of increasing mammalian cell expression of a protein of interest, comprising culturing mammalian cells that overexpress a protein of interest and are modified to overexpress a gene encoding Rab 11 or Yap1, as well as mammalian cells that overexpress a protein of interest and which are modified to overexpress a gene encoding Rab 11 or Yap1.Type: ApplicationFiled: January 30, 2015Publication date: April 27, 2017Applicant: Biogen MA Inc.Inventors: John Follit, Scott Estes
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Patent number: 7855130Abstract: An improved method of dicing a semiconductor wafer which substantially reduces or eliminates corrosion of copper-containing, aluminum bonding pads. The method involves continuously contacting the bonding pads with deionized water and an effective amount of a copper corrosion inhibiting agent, most preferably benzotriazole. Also disclosed, is an improved apparatus for dicing a wafer, in which a copper corrosion inhibiting agent is included in the cooling system for cooling the dicing blade.Type: GrantFiled: April 21, 2003Date of Patent: December 21, 2010Assignee: International Business Machines CorporationInventors: Robert R Cadieux, Scott A Estes, Timothy C Krywanczyk
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Publication number: 20090239235Abstract: Methods are disclosed to identify, select and produce a clonal population of recombinant eukaryotic host cells that stably and highly express a polypeptide of interest. Also disclosed herein are products produced by the disclosed methods and assemblies of components useful to conduct the methods.Type: ApplicationFiled: September 18, 2007Publication date: September 24, 2009Inventors: Christine DeMaria, Scott Estes, Kenneth P. Karey, Victor Cairns
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Publication number: 20080066864Abstract: An etch apparatus. The etch apparatus includes a tank coupled to a recirculating path that includes a dissolver. The dissolver includes a porous carbon matrix filter coated with silicon nitride. An etchant from the tank circulates through the recirculating path and performs a selective etching of a structure in the tank in contact with the etchant. The structure includes silicon nitride on a pad layer that includes silicon dioxide. The selective etching is characterized by the silicon nitride on the pad layer being selectively etched by the etchant relative to an etching by the etchant of the silicon dioxide. The etch apparatus further includes: means for dissolving the silicon nitride coated on the filter into the etchant at a controlled dissolution rate sufficient to cause the selective etching; and means for coating the silicon nitride onto the filter to facilitate the selective etching.Type: ApplicationFiled: November 28, 2007Publication date: March 20, 2008Inventors: Arne Ballantine, Scott Estes, Emily Fisch, Gary Milo, Ronald Warren
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Patent number: 7332054Abstract: In a process using a hot phosphoric acid etchant (12) to etch silicon nitride on a semiconductor wafer (15) submerged in a tank (11) of the etchant (12), a recirculating path is established for the etchant (12). A porous filter (35) is coated with silicon nitride and installed in the recirculating path. As the etchant (12) in the recirculating path flows through the porous filter (35), the silicon nitride on the porous filter (35) dissolves into the etchant (12). In the tank (11), the silicon nitride dissolved in the etchant (12) significantly suppresses the etch of silicon dioxide on the semiconductor wafer (15), thereby enhancing the etch selectivity of the process. Monitoring and maintaining the concentration of the silicon nitride in the etchant (12) stabilizes the etch selectivity of the process.Type: GrantFiled: January 20, 2004Date of Patent: February 19, 2008Assignee: International Business Machines CorporationInventors: Arne W. Ballantine, Scott A. Estes, Emily E. Fisch, Gary Milo, Ronald A. Warren
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Publication number: 20050026252Abstract: The invention relates to isolation of novel ?-actin and ribosomal protein S21 (rpS21) promoters and uses thereof. In particular, this invention features nucleotide sequences for rodent ?-actin promoters including, hamster, rat, and mouse, and hamster rpS21 promoter.Type: ApplicationFiled: June 24, 2004Publication date: February 3, 2005Inventors: Scott Estes, Weiqun Zhang
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Publication number: 20040209443Abstract: An improved method of dicing a semiconductor wafer which substantially reduces or eliminates corrosion of copper-containing, aluminum bonding pads. The method involves continuously contacting the bonding pads with deionized water and an effective amount of a copper corrosion inhibiting agent, most preferably benzotriazole. Also disclosed, is an improved apparatus for dicing a wafer, in which a copper corrosion inhibiting agent is included in the cooling system for cooling the dicing blade.Type: ApplicationFiled: April 21, 2003Publication date: October 21, 2004Applicant: International Business Machines CorporationInventors: Robert R. Cadieux, Scott A. Estes, Timothy C. Krywanczyk
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Publication number: 20040144750Abstract: In a process using a hot phosphoric acid etchant (12) to etch silicon nitride on a semiconductor wafer (15) submerged in a tank (11) of the etchant (12), a recirculating path is established for the etchant (12). A porous filter (35) is coated with silicon nitride and installed in the recirculating path. As the etchant (12) in the recirculating path flows through the porous filter (35), the silicon nitride on the porous filter (35) dissolves into the etchant (12). In the tank (11), the silicon nitride dissolved in the etchant (12) significantly suppresses the etch of silicon dioxide on the semiconductor wafer (15), thereby enhancing the etch selectivity of the process. Monitoring and maintaining the concentration of the silicon nitride in the etchant (12) stabilizes the etch selectivity of the process.Type: ApplicationFiled: January 20, 2004Publication date: July 29, 2004Inventors: Arne W. Ballantine, Scott A. Estes, Emily E. Fisch, Gary Milo, Ronald A. Warren
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Patent number: 6758912Abstract: A method for forming for inhibiting the buildup of cerlum-containing deposits in a process tool is disclosed. The method involves spraying a solution of a dilute acid, preferably nitric or perchloric acid, through the chamber and bowl rinse nozzles of the process tool. The method is less time consuming than previous methods for inhibiting the buildup of cerium-containing deposits and can be conveniently carried out at the end of every shift.Type: GrantFiled: October 29, 2002Date of Patent: July 6, 2004Assignee: International Business Machines CorporationInventors: Virginia Chi-Chuen Chao, Scott A. Estes, Thomas B. Faure, Thomas M. Wagner
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Patent number: 6699400Abstract: In a process using a hot phosphoric acid etchant (12) to etch silicon nitride on a semiconductor wafer (15) submerged in a tank (11) of the etchant (12), a recirculating path is established for the etchant (12). A porous filter (35) is coated with silicon nitride and installed in the recirculating path. As the etchant (12) in the recirculating path flows through the porous filter (35), the silicon nitride on the porous filter (35) dissolves into the etchant (12). In the tank (11), the silicon nitride dissolved in the etchant (12) significantly suppresses the etch of silicon dioxide on the semiconductor wafer (15), thereby enhancing the etch selectivity of the process. Monitoring and maintaining the concentration of the silicon nitride in the etchant (12) stabilizes the etch selectivity of the process.Type: GrantFiled: June 4, 1999Date of Patent: March 2, 2004Inventors: Arne W. Ballantine, Scott A. Estes, Emily E. Fisch, Gary Milo, Ronald A. Warren
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Publication number: 20030051740Abstract: A method for forming chrome photomasks and phase-shift masks without producing chrome opaque defects. The method involves rinsing the mask blank with dilute acid, preferably nitric or perchloric acid, during processing to form the photomask. When a dry etch is used to form the photomask, the mask blank is rinsed after wet development of the photoresist. When a wet etch is used to form the photomask, the mask blank is rinsed after the wet etch. This method decreases the number of defects per photomask as well as the mask-to-mask variation in the number of defects.Type: ApplicationFiled: October 29, 2002Publication date: March 20, 2003Inventors: Virginia Chi-Chuen Chao, Scott A. Estes, Thomas B. Faure, Thomas M. Wagner
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Patent number: 6494966Abstract: A method for removing contaminants from a substrate surface having a pattern formed on the surface. The method involves rinsing the substrate and pattern with water to remove acid reactive material. The substrate and pattern are then washed with an acid whose concentration is too low to attack the material that forms the pattern. Then the substrate is washed with water to remove the acid.Type: GrantFiled: December 7, 2000Date of Patent: December 17, 2002Assignee: International Business Machines CorporationInventors: Virginia Chi-Chuen Chao, Scott A. Estes, Thomas B. Faure, Thomas M. Wagner
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Publication number: 20010001958Abstract: A method for forming chrome photomasks and phase-shift masks without producing chrome opaque defects. The method involves rinsing the mask blank with dilute acid, preferably nitric or perchloric acid, during processing to form the photomask. When a dry etch is used to form the photomask, the mask blank is rinsed after wet development of the photoresist. When a wet etch is used to form the photomask, the mask blank is rinsed after the wet etch. This method decreases the number of defects per photomask as well as the mask-to-mask variation in the number of defects.Type: ApplicationFiled: December 7, 2000Publication date: May 31, 2001Inventors: Virginia Chi-Chuen Chao, Scott A. Estes, Thomas B. Faure, Thomas M. Wagner
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Patent number: 6191085Abstract: A method is provided for treating a plurality of semiconductor substrates using the same aqueous SC-1 solution which solution removes and/or inhibits contamination of the semiconductor surfaces by metallic ions present in the solution or on the substrate surface comprising a basic solution containing hydrogen peroxide and an oxidation-resistant chelating additive such as CDTA in an amount effective to provide the desired treatment results. The SC-1 solution may be the conventional 5:1:1 (water:NH4OH:H2O2) solution or a dilute solution such as a 5:x:1 to 200:x:l solution wherein x is 0.025 to 2.Type: GrantFiled: May 10, 1999Date of Patent: February 20, 2001Assignee: International Business Machines CorporationInventors: Emanuel I. Cooper, Scott A. Estes, Glenn W. Gale, Rangarajan Jagannathan, Harald F. Okorn-Schmidt, David L. Rath
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Patent number: 6162565Abstract: A method for forming chrome photomasks and phase-shift masks without producing chrome opaque defects. The method involves rinsing the mask blank with dilute acid, preferably nitric or perchloric acid, during processing to form the photomask. When a dry etch is used to form the photomask, the mask blank is rinsed after wet development of the photoresist. When a wet etch is used to form the photomask, the mask blank is rinsed after the wet etch. This method decreases the number of defects per photomask as well as the mask-to-mask variation in the number of defects.Type: GrantFiled: October 23, 1998Date of Patent: December 19, 2000Assignee: International Business Machines CorporationInventors: Virginia Chi-Chuen Chao, Scott A. Estes, Thomas B. Faure, Thomas M. Wagner
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Patent number: 5962384Abstract: A method is provided for treating a plurality of semiconductor substrates using the same aqueous SC-1 solution which solution removes and/or inhibits contamination of the semiconductor surfaces by metallic ions present in the solution or on the substrate surface comprising a basic solution containing hydrogen peroxide and an oxidation-resistant chelating additive such as CDTA in an amount effective to provide the desired treatment results. The SC-1 solution may be the conventional 5:1:1 (water:NH.sub.4 OH:H.sub.2 O.sub.2) solution or a dilute solution such as a 5:x:1 to 200:x:1 solution wherein x is 0.025 to 2.Type: GrantFiled: October 28, 1997Date of Patent: October 5, 1999Assignee: International Business Machines CorporationInventors: Emanuel I. Cooper, Scott A. Estes, Glenn W. Gale, Rangarajan Jagannathan, Harald F. Okorn-Schmidt, David L. Rath
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Patent number: 5946544Abstract: In a circuit board/IC package assembly the die cavity in the IC package body portion is filled with a thermally conductive liquid to substantially facilitate the transfer of operational die heat toward the inner, lid side of the IC package that faces the circuit board. To dissipate the die heat received by the die cavity lid, a spaced series of metal-plated through holes are formed in the circuit board. The metal plating portions of the through holes are engaged with an internal ground plane structure within the circuit board, and are thermally coupled to the IC package die cavity lid. Accordingly, during operation of the IC package, die heat is conducted to the ground plane structure sequentially through the die cavity liquid, the cavity lid, and the metal-plated through holes.Type: GrantFiled: November 22, 1996Date of Patent: August 31, 1999Assignee: Dell USA, L.P.Inventors: Scott Estes, Deepak Swamy
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Patent number: 5714789Abstract: In a circuit board/IC package assembly the die cavity in the IC package body portion is filled with a thermally conductive liquid to substantially facilitate the transfer of operational die heat toward the inner, lid side of the IC package that faces the circuit board. To dissipate the die heat received by the die cavity lid, a spaced series of metal-plated through holes are formed in the circuit board. The metal plating portions of the through holes are engaged with an internal ground plane structure within the circuit board, and are thermally coupled to the IC package die cavity lid. Accordingly, during operation of the IC package, die heat is conducted to the ground plane structure sequentially through the die cavity liquid, the cavity lid, and the metal-plated through holes.Type: GrantFiled: November 22, 1996Date of Patent: February 3, 1998Assignee: Dell U.S.A., L.P.Inventors: Scott Estes, Deepak Swamy
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Patent number: 5685073Abstract: A printed circuit board modular assembly is disclosed. The disclosed invention comprises a first printed circuit board having an electronic terminal portion for providing electrical connection to the first printed circuit board; a second printed circuit board having an electrical terminal portion for providing electrical connection to the second printed circuit board; a spacing member disposed between the first and second printed circuit boards; and electrical signal transmission contacts situated on the spacing member for providing electrical connection between the first printed circuit board and the second printed circuit board.Type: GrantFiled: June 1, 1995Date of Patent: November 11, 1997Assignee: Compaq Computer CorporationInventors: H. Scott Estes, James J. Ganthier
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Patent number: 5625227Abstract: In a circuit board/IC package assembly the die cavity in the IC package body portion is filled with a thermally conductive liquid to substantially facilitate the transfer of operational die heat toward the inner, lid side of the IC package that faces the circuit board. To dissipate the die heat received by the die cavity lid, a spaced series of metal-plated through holes are formed in the circuit board. The metal plating portions of the through holes are engaged with an internal ground plane structure within the circuit board, and are thermally coupled to the IC package die cavity lid. Accordingly, during operation of the IC package, die heat is conducted to the ground plane structure sequentially through the die cavity liquid, the cavity lid, and the metal-plated through holes.Type: GrantFiled: January 18, 1995Date of Patent: April 29, 1997Assignee: Dell USA, L.P.Inventors: Scott Estes, Deepak Swamy