Abstract: A table and chair set may include a table, a plurality of chairs and a storage case. The table may include a folding table top that has a footprint in the folded position. The chairs may be folding chairs that have a footprint generally equal to or slightly smaller than the footprint of the table in the folded position. The case may include an interior cavity that is sized and configured to receive at least a portion of the table and the chair in the folded positions, the cavity having a size generally equal to or slightly larger than the footprint of the folding table and the folding chair in the folded positions.

Abstract: The invention includes methods of forming semiconductor constructions in which electrically conductive structures are formed between bitlines to electrically connect with storage node contacts. The bitlines can be formed within trenches having faceted top portions. The invention also includes semiconductor structures containing trenches with faceted top portions, and containing bitlines within the trenches.

Abstract: This invention includes methods of forming conductive lines, and methods of forming conductive contacts adjacent conductive lines. In one implementation, a method of forming a conductive line includes forming a conductive line within an elongated trench within first insulative material over a semiconductive substrate. The conductive line is laterally spaced from opposing first insulative material sidewall surfaces of the trench. The conductive line includes a second conductive material received over a different first conductive material. The second conductive material is recessed relative to an elevationally outer surface of the first insulative material proximate the trench. A second insulative material different from the first insulative material is formed within the trench over a top surface of the conductive line and within laterally opposing spaces received between the first insulative material and the conductive line.

Abstract: The invention includes methods of forming semiconductor constructions in which electrically conductive structures are formed between bitlines to electrically connect with storage node contacts. The bitlines can be formed within trenches having faceted top portions. The invention also includes semiconductor structures containing trenches with faceted top portions, and containing bitlines within the trenches.

Abstract: The invention includes methods of forming semiconductor constructions in which electrically conductive structures are formed between bitlines to electrically connect with storage node contacts. The bitlines can be formed within trenches having faceted top portions. The invention also includes semiconductor structures containing trenches with faceted top portions, and containing bitlines within the trenches.

Abstract: The invention includes methods of forming semiconductor constructions in which electrically conductive structures are formed between bitlines to electrically connect with storage node contacts. The bitlines can be formed within trenches having faceted top portions. The invention also includes semiconductor structures containing trenches with faceted top portions, and containing bitlines within the trenches.

Abstract: The invention includes methods of forming semiconductor constructions in which electrically conductive structures are formed between bitlines to electrically connect with storage node contacts. The bitlines can be formed within trenches having faceted top portions. The invention also includes semiconductor structures containing trenches with faceted top portions, and containing bitlines within the trenches.

Abstract: This invention includes methods of forming conductive lines, and methods of forming conductive contacts adjacent conductive lines. In one implementation, a method of forming a conductive line includes forming a conductive line within an elongated trench within first insulative material over a semiconductive substrate. The conductive line is laterally spaced from opposing first insulative material sidewall surfaces of the trench. The conductive line includes a second conductive material received over a different first conductive material. The second conductive material is recessed relative to an elevationally outer surface of the first insulative material proximate the trench. A second insulative material different from the first insulative material is formed within the trench over a top surface of the conductive line and within laterally opposing spaces received between the first insulative material and the conductive line.

Abstract: This invention includes methods of forming conductive lines, and methods of forming conductive contacts adjacent conductive lines. In one implementation, a method of forming a conductive line includes forming a conductive line within an elongated trench within first insulative material over a semiconductive substrate. The conductive line is laterally spaced from opposing first insulative material sidewall surfaces of the trench. The conductive line includes a second conductive material received over a different first conductive material. The second conductive material is recessed relative to an elevationally outer surface of the first insulative material proximate the trench. A second insulative material different from the first insulative material is formed within the trench over a top surface of the conductive line and within laterally opposing spaces received between the first insulative material and the conductive line.

Abstract: This invention includes methods of forming conductive lines, and methods of forming conductive contacts adjacent conductive lines. In one implementation, a method of forming a conductive line includes forming a conductive line within an elongated trench within first insulative material over a semiconductive substrate. The conductive line is laterally spaced from opposing first insulative material sidewall surfaces of the trench. The conductive line includes a second conductive material received over a different first conductive material. The second conductive material is recessed relative to an elevationally outer surface of the first insulative material proximate the trench. A second insulative material different from the first insulative material is formed within the trench over a top surface of the conductive line and within laterally opposing spaces received between the first insulative material and the conductive line.

Abstract: A method and apparatus for mechanically and/or chemical-mechanically planarizing and cleaning microelectronic substrates. In one embodiment, a processing medium for planarizing and finishing a microelectronic substrate has a planarizing section with a first body composed of a first material and a finishing section with a second body composed of a second material. The first body may have a relatively firm planarizing surface to engage the substrate, and the first body supports abrasive particles at the planarizing surface to remove material from the substrate during a planarizing cycle. The second body may have a relatively soft buffing or finishing surface clean the abrasive particles and other matter from the substrate during a finishing cycle. The planarizing and finishing sections may be fixedly attached to a backing film, or they may be attached to one another along abutting edges with or without the backing film.

Abstract: An apparatus and method for refurbishing fixed-abrasive polishing pads. In one embodiment, a refurbishing device has an arm positionable over the planarizing surface of the polishing pad, a refurbishing element attached to one end of the arm, and an actuator connected to the other end of the arm. The refurbishing element has a non-abrasive contact medium engageable with the planarizing surface of the polishing pad that does not abrade or otherwise damage raised features on the fixed-abrasive pad under desired conditioning down forces. The actuator moves the arm downwardly and upwardly with respect to the planarizing surface to engage and disengage the non-abrasive contact medium with the planarizing surface of the polishing pad. The refurbishing device may also have a conditioning solution dispenser positionable proximate to the planarizing surface of the polishing pad to dispense a liquid conditioning solution onto the planarizing surface.

Abstract: A method and apparatus for mechanically and/or chemical-mechanically planarizing and cleaning microelectronic substrates. In one embodiment, a processing medium for planarizing and finishing a microelectronic substrate has a planarizing section with a first body composed of a first material and a finishing section with a second body composed of a second material. The first body may have a relatively firm planarizing surface to engage the substrate, and the first body supports abrasive particles at the planarizing surface to remove material from the substrate during a planarizing cycle. The second body may have a relatively soft buffing or finishing surface clean the abrasive particles and other matter from the substrate during a finishing cycle. The planarizing and finishing sections may be fixedly attached to a backing film, or they may be attached to one another along abutting edges with or without the backing film.

Abstract: A method and apparatus for mechanically and/or chemical-mechanically planarizing and cleaning microelectronic substrates. In one embodiment, a processing medium for planarizing and finishing a microelectronic substrate has a planarizing section with a first body composed of a first material and a finishing section with a second body composed of a second material. The first body may have a relatively firm planarizing surface to engage the substrate, and the first body supports abrasive particles at the planarizing surface to remove material from the substrate during a planarizing cycle. The second body may have a relatively soft buffing or finishing surface clean the abrasive particles and other matter from the substrate during a finishing cycle. The planarizing and finishing sections may be fixedly attached to a backing film, or they may be attached to one another along abutting edges with or without the backing film.

Abstract: A method and apparatus for mechanically and/or chemical-mechanically planarizing and cleaning microelectronic substrates. In one embodiment, a processing medium for planarizing and finishing a microelectronic substrate has a planarizing section with a first body composed of a first material and a finishing section with a second body composed of a second material. The first body may have a relatively firm planarizing surface to engage the substrate, and the first body supports abrasive particles at the planarizing surface to remove material from the substrate during a planarizing cycle. The second body may have a relatively soft buffing or, finishing surface clean the abrasive particles and other matter from the substrate during a finishing cycle. The planarizing and finishing sections may be fixedly attached to a backing film, or they may be attached to one another along abutting edges with or without the backing film.

Abstract: A method and apparatus for mechanically and/or chemical-mechanically planarizing and cleaning microelectronic substrates. In one embodiment, a processing medium for planarizing and finishing a microelectronic substrate has a planarizing section with a first body composed of a first material and a finishing section with a second body composed of a second material. The first body may have a relatively firm planarizing surface to engage the substrate, and the first body supports abrasive particles at the planarizing surface to remove material from the substrate during a planarizing cycle. The second body may have a relatively soft buffing or finishing surface clean the abrasive particles and other matter from the substrate during a finishing cycle. The planarizing and finishing sections may be fixedly attached to a backing film, or they may be attached to one another along abutting edges with or without the backing film.

Abstract: A method and apparatus for mechanically and/or chemical-mechanically planarizing and cleaning microelectronic substrates. In one embodiment, a processing medium for planarizing and finishing a microelectronic substrate has a planarizing section with a first body composed of a first material and a finishing section with a second body composed of a second material. The first body may have a relatively firm planarizing surface to engage the substrate, and the first body supports abrasive particles at the planarizing surface to remove material from the substrate during a planarizing cycle. The second body may have a relatively soft buffing or finishing surface clean the abrasive particles and other matter from the substrate during a finishing cycle. The planarizing and finishing sections may be fixedly attached to a backing film or they may be attached to one another along abutting edges with or without the backing film.

Abstract: Methods for predicting polishing characteristics of polishing pads in mechanical or chemical-mechanical planarization of microelectronic substrate assemblies, and methods and machines for planarizing microelectronic substrate assemblies. One embodiment of a method in accordance with the invention includes ascertaining a surface parameter of a bearing surface of at least one raised feature projecting from a base portion of a raised feature polishing pad. The raised feature, for example, can be a pyramidal structure having a first cross-sectional area at the base portion of the pad and a second cross-sectional area at the bearing surface. The first cross-sectional area is generally greater than the second cross-sectional area. To ascertain the surface parameter of the bearing surface, one particular embodiment of the invention involves determining an indication of the surface area of the bearing surface.

Abstract: A method and apparatus for mechanically and/or chemical-mechanically planarizing and cleaning microelectronic substrates. In one embodiment, a processing medium for planarizing and finishing a microelectronic substrate has a planarizing section with a first body composed of a first material and a finishing section with a second body composed of a second material. The first body may have a relatively firm planarizing surface to engage the substrate, and the first body supports abrasive particles at the planarizing surface to remove material from the substrate during a planarizing cycle. The second body may have a relatively soft buffing or finishing surface clean the abrasive particles and other matter from the substrate during a finishing cycle. The planarizing and finishing sections may be fixedly attached to a backing film, or they may be attached to one another along abutting edges with or without the backing film.

Abstract: Methods for predicting polishing characteristics of polishing pads in mechanical or chemical-mechanical planarization of microelectronic substrate assemblies, and methods and machines for planarizing microelectronic substrate assemblies. One embodiment of a method in accordance with the invention includes ascertaining a surface parameter of a bearing surface of at least one raised feature projecting from a base portion of a raised feature polishing pad. The raised feature, for example, can be a pyramidal structure having a first cross-sectional area at the base portion of the pad and a second cross-sectional area at the bearing surface. The first cross-sectional area is generally greater than the second cross-sectional area. To ascertain the surface parameter of the bearing surface, one particular embodiment of the invention involves determining an indication of the surface area of the bearing surface.