Patents by Inventor Scott Bardsley

Scott Bardsley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8928517
    Abstract: An analog-to-digital converter includes a plurality of sequentially cascaded stages, each stage including an amplifier and four copies of a circuit block including a flash and capacitors, in which the four copies of the circuit block operate interleavingly in a respective sample mode, pre-gain mode, gain mode, and reset mode of the circuit block, the copies of the circuit block in the sample mode, pre-gain mode, and reset mode are decoupled from the amplifier, and the copy of the circuit block in the gain mode is coupled to the amplifier to produce an output for a next following stage.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: January 6, 2015
    Assignee: Analog Devices, Inc.
    Inventors: Scott Bardsley, Franklin Murden, Peter Derounian, Eric Siragusa
  • Patent number: 8368576
    Abstract: An analog-to-digital converter includes a plurality of sequentially cascaded stages, each stage including an amplifier and four copies of a circuit block including a flash and capacitors, in which the four copies of the circuit block operate interleavingly in a respective sample mode, pre-gain mode, gain mode, and reset mode of the circuit block, the copies of the circuit block in the sample mode, pre-gain mode, and reset mode are decoupled from the amplifier, and the copy of the circuit block in the gain mode is coupled to the amplifier to produce an output for a next following stage.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: February 5, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Scott Bardsley, Franklin Murden, Eric Siragusa, Peter Derounian
  • Publication number: 20120274497
    Abstract: An analog-to-digital converter includes a plurality of sequentially cascaded stages, each stage including an amplifier and four copies of a circuit block including a flash and capacitors, in which the four copies of the circuit block operate interleavingly in a respective sample mode, pre-gain mode, gain mode, and reset mode of the circuit block, the copies of the circuit block in the sample mode, pre-gain mode, and reset mode are decoupled from the amplifier, and the copy of the circuit block in the gain mode is coupled to the amplifier to produce an output for a next following stage.
    Type: Application
    Filed: April 27, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Scott BARDSLEY, Franklin MURDEN, Eric SIRAGUSA, Peter DEROUNIAN
  • Publication number: 20110052097
    Abstract: A computer-implemented method and system are provided for tracking image capture compliance with an image capture criteria. Method and system aspects of the exemplary embodiment include providing an image capture plan including a list of images specified for capturing during an image capture occurrence, wherein the list of images is based on at least one image capture subject and constraints associated with the at least one image capture subject; determining a progress towards completing the image capture plan based on whether information is received for an image capture occurrence of the at least one image capture subject by an image capture device; and providing an indication of the progress, the indication identifying at least one image from the group of images that has not been captured.
    Type: Application
    Filed: November 4, 2010
    Publication date: March 3, 2011
    Inventors: Robert Sundstrom, Scott Bardsley, Mona Singh
  • Patent number: 7853100
    Abstract: A computer-implemented method and system are provided for tracking image capture compliance with an image capture criteria. Method and system aspects of the exemplary embodiment include receiving user-defined criteria for specifying an image capture plan that defines at least one image capture subject and constraints associated with the at least one image capture subject; determining a progress towards completing the image capture plan based on whether information is received for an image capture occurrence of the at least one image capture subject by an image capture device, wherein multiple image capture occurrences occurring in any order are counted toward completing the image capture plan; and providing an indication of the compliance progress.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: December 14, 2010
    Assignee: FotoMedia Technologies, LLC
    Inventors: Robert Sundstrom, Scott Bardsley, Mona Singh
  • Publication number: 20080037826
    Abstract: A computer-implemented method and system are provided for tracking image capture compliance with an image capture criteria. Method and system aspects of the exemplary embodiment include receiving user-defined criteria for specifying an image capture plan that defines at least one image capture subject and constraints associated with the at least one image capture subject; determining a progress towards completing the image capture plan based on whether information is received for an image capture occurrence of the at least one image capture subject by an image capture device, wherein multiple image capture occurrences occurring in any order are counted toward completing the image capture plan; and providing an indication of the compliance progress.
    Type: Application
    Filed: August 8, 2006
    Publication date: February 14, 2008
    Applicant: Scenera Research, LLC
    Inventors: Robert Sundstrom, Scott Bardsley, Mona Singh
  • Publication number: 20070290913
    Abstract: An analog to digital converter system includes at least one stage for providing a first full precision, full latency output and a second output providing a less than full latency, less than full precision coarse level indicator signal.
    Type: Application
    Filed: April 2, 2007
    Publication date: December 20, 2007
    Inventors: William George John Schofield, Joseph Bradford Bannon, Carroll Speir, Scott Bardsley
  • Publication number: 20050242977
    Abstract: An improved pipelined analog to digital converter that facilitates calibration for non-linearity errors and a method for obtaining calibration values. The analog to digital converter has a calibration mode in which the output bits for stages in the pipeline can be coupled to output pins of the device. Device pins that are used in normal operating mode to output the most significant bits of the ADC output are used in calibration mode to make available output bits of a pipeline stage being calibrated. A calibration method takes advantage of the outputs of the stages being directly observable to compute calibration values. The output bits of a pipeline stage are monitored as the analog input to the ADC is increased. A change in these bits identifies a subrange boundary. Errors are measured for values immediately above and immediately below each subrange boundary and used to compute correction factors.
    Type: Application
    Filed: April 28, 2004
    Publication date: November 3, 2005
    Applicant: Analog Devices, Inc.
    Inventors: Scott Bardsley, Baeton Rigsbee
  • Publication number: 20050137817
    Abstract: Methods and apparatus for calibrating one or more signals of an electronic device are provided. Calibration coefficients are stored in a memory, such as a fuse bank, to be applied to correct the one or more signals. A selection multiplexer is provided, the selection multiplexer capable of assigning one of a number of bit weight configurations to the calibration coefficients to set a desired range and resolution for calibration information applied to the one or more signals of the electronic device.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Applicant: Analog Devices, Inc.
    Inventor: Scott Bardsley