Abstract: In a burst mode communication system bursts arrive at a receiver which must correctly acquire and track carrier and clock phases in order to recover the transmitted symbols. A burst mode receiver is used to recover the clock and carrier phase. The detection of an initiator pulse indicates the presence of a burst signal, and a cross-coupled fractionally spaced digital filter structure is used with a known preamble to perform symbol sampling phase recovery and carrier phase acquisition, and during the normal mode of operation results in a tracking of the symbol and carrier phases.

Abstract: A method and apparatus for an in-home communication system based on the use of a telecommunications terminal of a Fiber-to-the-Curb (FTTC) network is described. In this system signals are sent from a first device in a home to the FTTC terminal over a subscriber coaxial cable network, and routed from the telecommunications terminal back to the home, where they are received by a second device in the same home. Signals are routed back to the home at the telecommunications terminal by recognizing a particular address which corresponds to in-home signals or by timing information. In the event that the information is contained within Asynchronous Transfer Mode (ATM) cells, the Virtual Path Identifier (VPI) field of the ATM cells can be used to indicate that cells are to be redirected back to the home.

Abstract: Logic which implements an output encoded finite state machine is reduced by resolving "don't care" output values. Specifically, in order to generate logic for a finite state machine, input is received from a user. The input specifies states of the finite state machine, transition conditions between states and output values for each state. For example, a graphical user interface receives from the user a graphic portrayal of a state diagram. At least one output value is unspecified for at least one state. Logic for a finite state machine is generated from the user inputs. The generation includes, for each output of the finite state machine, generating an output flip-flop which stores the output. Values are assigned to unspecified output values. The assigned values are selected so that each state can be uniquely identified by current values stored by the output flip-flops and a minimum of additional flip-flops.

Abstract: Transmission of a first message over a local area network is delayed by a delay value. The delay value is calculated based on a backoff value in a backoff counter and a generated random number. Transmission of the first message is deferred when another node on the local area network begins transmission of another message while transmission of the first message is being delayed for the delay value. The backoff value in the backoff counter is incremented when the transmission of the first message is deferred. The backoff value in the backoff counter is incremented when transmission of the first message collides with transmission of another message by another node on the local area network. The backoff value in the backoff counter is decremented when the first message is transmitted without being deferred and without colliding with transmission of another message.

Abstract: Logic to determine the current state of an output encoded finite state machine is minimized. Specifically, in order to generate logic for a finite state machine, input is received from a user. The input specifies states of the finite state machine, transition conditions between states and output values for each state. For example, a graphical user interface is used to receive a graphic portrayal of a state diagram. Logic is generated which implements the finite state machine from the inputs received by the interface means. Particularly, a plurality of flip-flops is generated. A first set of flip-flops is for storing output for the finite state machine. A second set of flip-flops is used, when necessary, with the first set of flip-flops to uniquely identify each state. When output values of the first set of flip-flops uniquely identify each state, the second set of flip-flops is not used (i.e., the second set of flip-flops is the null set).