Abstract: A semiconductor wafer having a matrix array of micro-mirrors comprises a component substrate carried on a base substrate. The component substrate comprises a membrane layer in which the micro-mirrors are formed and a supporting handle layer. The base substrate comprises a base layer from which a plurality of pedestals extend upwardly therefrom into cavities in the handle layer corresponding to the micro-mirrors. Each pedestal carries electrodes for co-operating with the micro-mirrors for tilting thereof. Conductors through vias in the pedestals connect the electrodes to electrically conductive tracks on a bottom surface, and in turn through conductors through vias to addressing terminals for addressing the electrodes.

Abstract: A method for forming a multi-layer semiconductor device (1) having a lower silicon layer (4), an intermediate silicon layer (5) within which micro-mirrors (10) are formed and an upper spacer layer (6) of silicon for spacing another component from the micro-mirrors (10). First and second etch stop layers (8,9) of oxide act as insulation between the respective layers (4,5,6). In order to minimize damage to the micro-mirrors (10), the formation of the micro-mirrors (10) is left to the end of the forming process. An assembly of the lower layer (4) and the intermediate layer (5) with the first etch stop layer (8) is formed, and the second etch stop layer (9) is then grown and patterned on the intermediate layer (5) for subsequent formation of the micro-mirrors (10). The upper layer (5) is then bonded by an annealing process to the patterned second etch stop layer (9).

Abstract: A semiconductor wafer (1) having a matrix array of micro-mirrors (2) comprises a component substrate (4) carried on a base substrate (5). The component substrate (4) comprises a membrane layer (8) in which the micro-mirrors (2) are formed and a supporting handle layer (9). The base substrate (5) comprises a base layer (15) from which a plurality of pedestals (18) extend upwardly therefrom into cavities (14) in the handle layer (9) corresponding to the micro-mirrors (2). Each pedestal (18) carries electrodes (25) for co-operating with the micro-mirrors (2) for tilting thereof. Conductors (28) through vias (27) in the pedestals (18) connect the electrodes (25) to electrically conductive tracks (29) on a bottom surface (16), and in turn through conductors (36) through vias (35) to addressing terminals (33) for addressing the electrodes (25).

Abstract: A semiconductor wafer having a matrix array of micro-mirrors comprises a component substrate carried on a base substrate. The component substrate comprises a membrane layer in which the micro-mirrors are formed and a supporting handle layer. The base substrate comprises a base layer from which a plurality of pedestals extend upwardly therefrom into cavities in the handle layer corresponding to the micro-mirrors. Each pedestal carries electrodes for co-operating with the micro-mirrors for tilting thereof. Conductors through vias in the pedestals connect the electrodes to electrically conductive tracks on a bottom surface, and in turn through conductors through vias to addressing terminals for addressing the electrodes.

Abstract: A semiconductor wafer (1) having a matrix array of micro-mirrors (2) comprises a component substrate (4) carried on a base substrate (5). The component substrate (4) comprises a membrane layer (8) in which the micro-mirrors (2) are formed and a supporting handle layer (9). The base substrate (5) comprises a base layer (15) from which a plurality of pedestals (18) extend upwardly therefrom into cavities (14) in the handle layer (9) corresponding to the micro-mirrors (2). Each pedestal (18) carries electrodes (25) for co-operating with the micro-mirrors (2) for tilting thereof.