Patents by Inventor SCOTT CLENDENNING

SCOTT CLENDENNING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200312971
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate and a FinFET transistor on the substrate. The FinFET transistor includes a fin structure having a channel area, a source area, and a drain area. The FinFET transistor further includes a gate dielectric area between spacers above the channel area of the fin structure and below a top surface of the spacers; spacers above the fin structure and around the gate dielectric area; and a metal gate conformally covering and in direct contact with sidewalls of the spacers. The gate dielectric area has a curved surface. The metal gate is in direct contact with the curved surface of the gate dielectric area. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 29, 2019
    Publication date: October 1, 2020
    Inventors: Ashish PENUMATCHA, Seung Hoon SUNG, Scott CLENDENNING, Uygar AVCI, Ian A. YOUNG, Jack T. KAVALIEROS
  • Publication number: 20170330972
    Abstract: Methods of selectively depositing high-K gate dielectric on a semiconductor structure are disclosed. The method includes providing a semiconductor structure disposed above a semiconductor substrate. The semiconductor structure is disposed beside an isolation sidewall. A sacrificial blocking layer is then selectively deposited on the isolation sidewall and not on the semiconductor structure. Thereafter, a high-K gate dielectric is deposited on the semiconductor structure, but not on the sacrificial blocking layer. Properties of the sacrificial blocking layer prevent deposition of oxide material on its surface. A thermal treatment is then performed to remove the sacrificial blocking layer, thereby forming a high-K gate dielectric only on the semiconductor structure.
    Type: Application
    Filed: December 19, 2014
    Publication date: November 16, 2017
    Inventors: GRANT KLOSTER, SCOTT CLENDENNING, Rami HOURANI, SZUYA S. LIAO, PATRICIO E. ROMERO, FLORIAN GSTREIN