Abstract: A firearm compatible with pistol magazines and cartridges is disclosed. The firearm may include an upper receiver. The firearm also may include a bolt carrier having at least one fixed bolt carrier key extending therefrom. In addition, the firearm may include a recoil spring guide rod. The at least one bolt carrier key may be slidably attached to the recoil spring guide rod. A recoil spring may be disposed on the recoil spring guide rod between the at least one bolt carrier key and a recoil bumper.

Abstract: A cover assembly for a battery module is configured to be coupled to battery cells that are arranged side-by-side in a stacked configuration. The cover assembly includes a housing, a plurality of bus bars, and an electrical cable. The bus bars are held by the housing and are configured to electrically connect to corresponding positive and negative cell terminals of the battery cells to electrically connect adjacent battery cells. The cable extends across the bus bars and is electrically connected to each of the bus bars to monitor voltages across the battery cells. The cable includes plural electrical conductors and a dielectric insulator that surrounds and electrically isolates the conductors. The conductors include exposed segments exposed through the dielectric insulator that are electrically connected to corresponding bus bars via a bonding layer applied between the exposed segment and the corresponding bus bar.

Abstract: A firearm compatible with pistol magazines and cartridges is disclosed. The firearm may include an upper receiver. The firearm also may include a bolt carrier having at least one fixed bolt carrier key extending therefrom. In addition, the firearm may include a recoil spring guide rod. The at least one bolt carrier key may be slidably attached to the recoil spring guide rod. A recoil spring may be disposed on the recoil spring guide rod between the at least one bolt carrier key and a recoil bumper.

Abstract: A cover assembly for a battery module is configured to be coupled to battery cells that are arranged side-by-side in a stacked configuration. The cover assembly includes a housing, a plurality of bus bars, and an electrical cable. The bus bars are held by the housing and are configured to electrically connect to corresponding positive and negative cell terminals of the battery cells to electrically connect adjacent battery cells. The cable extends across the bus bars and is electrically connected to each of the bus bars to monitor voltages across the battery cells. The cable includes plural electrical conductors and a dielectric insulator that surrounds and electrically isolates the conductors. The conductors include exposed segments exposed through the dielectric insulator that are electrically connected to corresponding bus bars via a bonding layer applied between the exposed segment and the corresponding bus bar.

Abstract: After a step of fabricating a MOS transistor (14) on a semiconductor substrate (11) and further steps up to bury a W plug (24), an Ir film (25a), an IrOy film (25b), a PZT film (26), and an IrOx film (27) are formed sequentially over the entire surface. The composition of the PZT film (26) is such that the content of Pb exceeds that of Zr and that of Ti. After processing the Ir film (25a), the IrOy film (25b), the PZT film (26) and the IrOx film (27), annealing is effected to remedy the damage to the PZT film (26) that is caused when the IrOx film (27) is formed and to diffuse Ir in the IrOx film (27) into the PZT film (26). As a result, the Ir diffused into the PZT film (26) concentrates at an interface between the IrOx film (27) and the PZT film (26) and at grain boundaries in the PZT film (26), and the Ir concentrations at the interface and boundaries are higher than those in the grains.

Abstract: Two ferroelectric capacitors including a PZT film are connected to one MOS transistor. Electrodes of the ferroelectric capacitor are arranged above a main plane of a substrate parallel to the main plane. Therefore, high capacity can be obtained easily. Furthermore, a (001) direction of the PZT film is parallel to the virtual straight line linking between the two electrodes. Therefore, a direction in which an electric field is applied coincides with a direction of a polarization axis, so that high electric charge amount of remanent polarization can be obtained.

Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.

Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.

Abstract: Two ferroelectric capacitors including a PZT film are connected to one MOS transistor. Electrodes of the ferroelectric capacitor are arranged above a main plane of a substrate parallel to the main plane. Therefore, high capacity can be obtained easily. Furthermore, a (001) direction of the PZT film is parallel to the virtual straight line linking between the two electrodes. Therefore, a direction in which an electric field is applied coincides with a direction of a polarization axis, so that high electric charge amount of remanent polarization can be obtained.

Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.

Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.

Abstract: A ferroelectric capacitor includes a lower electrode, a ferroelectric capacitor insulation film formed on the lower electrode and an upper electrode formed on the ferroelectric capacitor insulation film, wherein the ferroelectric capacitor insulation film has a composition of PZT and contains an excess amount of Pb with respect to a stoichiometry of PZT.

Abstract: A ferroelectric capacitor includes a lower electrode, a ferroelectric capacitor insulation film formed on the lower electrode and an upper electrode formed on the ferroelectric capacitor insulation film, wherein the ferroelectric capacitor insulation film has a composition of PZT and contains an excess amount of Pb with respect to a stoichiometry of PZT.

Abstract: The semiconductor device comprises a first electrode 36, a ferroelectric film 38 formed on the first electrode, and a second electrode 46 formed on the ferroelectric film. The first electrode or the second electrode comprises SrRuOx films 30, 40 with Pb and/or Bi added. Pb and Bi are added to the SRO film, whereby the diffusion of the Pb and Bi contained in the ferroelectric film into the SRO film are suppressed, which leads to an improvement of capacitor ferroelectric properties. Thus, the semiconductor device can realize low-voltage operation and hydrogen deterioration resistance by using the SRO film.

Abstract: The semiconductor device comprises a first electrode 36, a ferroelectric film 38 formed on the first electrode, and a second electrode 46 formed on the ferroelectric film. The first electrode or the second electrode comprises SrRuOx films 30, 40 with Pb and/or Bi added. Pb and Bi are added to the SRO film, whereby the diffusion of the Pb and Bi contained in the ferroelectric film into the SRO film are suppressed, which leads to an improvement of capacitor ferroelectric properties. Thus, the semiconductor device can realize low-voltage operation and hydrogen deterioration resistance by using the SRO film.