Abstract: The present invention can include a solution that dynamically manages electronic calendar events based upon the key performance indicators (KPIs) of a business process monitoring (BPM) system. Such a system can include a BPM system, an electronic calendar software application, and a dynamic calendar event manager. The BPM system can be configured to manage data for many user-defined KPIs. The electronic calendar software application can be configured to manage the calendar data of various calendar events for many users. The dynamic calendar event definition can be configured to define a condition for modifying the calendar data of a user-specified calendar event. The dynamic calendar event definition can consist of a KPI threshold value, a calendar action, and an applicable attendee list. The dynamic calendar event manager can be configured to dynamically and automatically handle the modification of the calendar data in accordance with the dynamic calendar event definition.

Abstract: A method, system, and computer program product for efficiently fulfilling java server page (JSP) requests for dynamic web content, in a computer network system. An asynchronous processing (AP) utility pre-defines a number of custom classes to enable the asynchronous processing of requests. A JSP which contains a custom “async:include” tag indicates an asynchronous request for dynamic content. When a set of asynchronous requests are received by an application server, an “AsyncRequestDispatcher” is called to handle the asynchronous processing of each associated request dispatcher include fragment. For each fragment, a separate request thread is initiated. A placeholder corresponding to each “async:include” request is written to a servlet response buffer. HyperText Markup Language (HTML) content, which includes the placeholders, and a number of javascripts are then written to the client browser. The original thread is closed.

Abstract: The present invention can include a solution that dynamically manages electronic calendar events based upon the key performance indicators (KPIs) of a business process monitoring (BPM) system. Such a system can include a BPM system, an electronic calendar software application, and a dynamic calendar event manager. The BPM system can be configured to manage data for many user-defined KPIs. The electronic calendar software application can be configured to manage the calendar data of various calendar events for many users. The dynamic calendar event definition can be configured to define a condition for modifying the calendar data of a user-specified calendar event. The dynamic calendar event definition can consist of a KPI threshold value, a calendar action, and an applicable attendee list. The dynamic calendar event manager can be configured to dynamically and automatically handle the modification of the calendar data in accordance with the dynamic calendar event definition.

Abstract: Disclosed are color-imparting chocolate compositions. The compositions are formulated to have a visual appearance consistent with a conventional chocolate composition, yet include a visually hidden (i.e., hidden to the unaided eye) color-imparting dye. Upon contact with a water-based liquid (e.g., during the act of consuming the chocolate composition), the color-imparting dye is activated and imparts its color to the water-based liquid and/or to a surface wetted or in contact with the water-based liquid.

Abstract: A processor system. The processor system comprises a processor having a first set of instructions associated therewith. The processor system also comprises a programmable logic device and an extension adapter coupled to the processor and the programmable logic device. The extension adapter allows the programmable logic device to implement a second set of reconfigurable instructions for the processor.

Abstract: A method, system, and computer program product for efficiently fulfilling java server page (JSP) requests for dynamic web content, in a computer network system. An asynchronous processing (AP) utility pre-defines a number of custom classes to enable the asynchronous processing of requests. A JSP which contains a custom “async:include” tag indicates an asynchronous request for dynamic content. When a set of asynchronous requests are received by an application server, an “AsyncRequestDispatcher” is called to handle the asynchronous processing of each associated request dispatcher include fragment. For each fragment, a separate request thread is initiated. A placeholder corresponding to each “async:include” request is written to a servlet response buffer. HyperText Markup Language (HTML) content, which includes the placeholders, and a number of javascripts are then written to the client browser. The original thread is closed.

Abstract: A modified oilseed material formed from oilseed-based material is described. The modified oilseed material can be utilized in a variety of nutritional applications, including the preparation of protein supplemented food products such as beverages, processed meats, frozen desserts, confectionery products, dairy-type products, and cereal grain products. The modified oilseed material typically includes at least 85 wt. % protein (dry solids basis), at least about 40 wt % of the protein in the modified oilseed material has an apparent molecular weight of at least 300 kDa, and/or the modified oilseed material has a MW50 of at least about 200 kDa.

Abstract: A Galois field multiplier array includes a 1st register, a 2nd register, a 3rd register, and a plurality of multiplier cells. The 1st register stores bits of a 1st operand. The 2nd register stores bits of a 2nd operand. The 3rd register stores bits of a generating polynomial that corresponds to one of a plurality of applications (e.g., FEC, CRC, Reed Solomon, et cetera). The plurality of multiplier cells is arranged in rows and columns. Each of the multiplier cells outputs a sum and a product and each cell includes five inputs. The 1st input receives a preceding cell's multiply output, the 2nd input receives at least one bit of the 2nd operand, the 3rd input receives a preceding cell's sum output, a 4th input receives at least one bit of the generating polynomial, and the 5th input receives a feedback term from a preceding cell in a preceding row. The multiplier cells in the 1st row have the 1st input, 3rd input, and 5th input set to corresponding initialization values in accordance with the 2nd operand.

Abstract: Incorporating a plurality of tags into a Java server page (JSP) or JSP-compliant page fragment to insert portlet content from a portlet onto a page without using an enterprise portal application. Each of the plurality of tags conforms to Java 2 Platform Enterprise Edition (J2EE) and JSP. The portlet content conforms to Java Specification Request (JSR) 168. The tags specify a rendering of portlet content in the JSP-compliant page or page fragment such that no change is introduced to the portlet itself. The tags include an initialization tag setting forth a uniform resource locator (URL) prefix, an insertion tag setting forth a first URL, and a state tag setting forth a second URL, wherein the first URL and the second URL may, but need not, be identical.

Abstract: A processor includes an instruction memory, arithmetic logic unit, finite field arithmetic unit, at least one digital storage device, and an instruction decoder. The instruction memory temporarily stores an instruction that includes at least one of: an operational code, destination information, and source information. The instruction decoder is operably coupled to interpret the instruction to identify the arithmetic logic unit and/or the finite field arithmetic unit to perform the operational code of the corresponding instruction. The instruction decoder then identifies at least one destination location within the digital storage device based on the destination information contained within the corresponding instruction. The instruction decoder then identifies at least one source location within the digital storage device based on the source information of the corresponding instruction.

Abstract: A Galois field arithmetic unit includes a Galois field multiplier section and a Galois field adder section. The Galois field multiplier section includes a plurality of Galois field multiplier arrays that perform a Galois field multiplication by multiplying, in accordance with a generating polynomial, a 1st operand and a 2nd operand. The bit size of the 1st and 2nd operands correspond to the bit size of a processor data path, where each of the Galois field multiplier arrays performs a portion of the Galois field multiplication by multiplying, in accordance with a corresponding portion of the generating polynomial, corresponding portions of the 1st and 2nd operands. The bit size of the corresponding portions of the 1st and 2nd operands corresponds to a symbol size of symbols of a coding scheme being implemented by the corresponding processor.

Abstract: A reconfigurable processing system executes instructions and configurations in parallel. Initially, a first instruction loads configurations into configuration registers. The configuration field of a subsequently fetched instruction selects a configuration register. The instruction controls and controls of the configuration in the selected configuration register are decoded and modified as specified by the instruction. The controls provide data operands to the execution units which process the operands and generate results. Scalar data, vector data, or a combination of scalar and vector data can be processed. The processing is controlled by instructions executed in parallel with configurations invoked by configuration fields within the instructions. Vectors are processed using a vector register file which stores vectors. A vector address unit identifies addresses of vector elements in the vector register file to be processed.

Abstract: A modified oilseed material formed from oilseed-based material is described. The modified oilseed material can be utilized in a variety of nutritional applications, including the preparation of protein supplemented food products such as beverages, processed meats, frozen desserts, confectionery products, dairy-type products, cooked dough products and cereal grain products. The modified oilseed material typically includes at least 85 wt. % protein (dry solids basis), at least about 40 wt. % of the protein in the modified oilseed material has an apparent molecular weight of at least 300 kDa, and/or the modified oilseed material has a MW50 of at least about 200 kDa.

Abstract: A processor system. The processor system comprises a processor having a first set of instructions associated therewith. The processor system also comprises a programmable logic device and an extension adapter coupled to the processor and the programmable logic device. The extension adapter allows the programmable logic device to implement a second set of reconfigurable instructions for the processor.

Abstract: A protein supplemented food product formed from a premix which includes modified oilseed material is described. The premix can be utilized in a variety of nutritional applications, including the preparation of protein supplemented food products such as ready-to-eat cereals and other cereal grain products, wherein the modified oilseed material typically includes at least 85 wt. % protein (dry solids basis), and at least about 40 wt. % of the protein has an apparent molecular weight of greater than 300 kDa, and/or the protein has a MW50 of at least about 200 kDa.

Abstract: A modified oilseed material formed from oilseed-based material is described. The modified oilseed material can be utilized in a variety of nutritional applications, including the preparation of protein supplemented food products such as beverages, processed meats, frozen desserts, confectionery products, dairy-type products, and cereal grain products. The modified oilseed material typically includes at least 85 wt. % protein (dry solids basis), at least about 40 wt % of the protein in the modified oilseed material has an apparent molecular weight of at least 300 kDa, and/or the modified oilseed material has a MW50 of at least about 200 kDa.

Abstract: A confectionery composition that has a relatively low caloric content and includes erythritol and an fructo-oligosaccharide component is disclosed. The composition may also include isomalt, polydextrose and/or a high protein material. The composition generally contains very low levels of sugars, such as sucrose, and preferably is substantially free of sugars altogether. The composition typically includes a sufficient amount of fructo-oligosaccharide (“FOS”) and/or other components to substantially neutralize the cooling effect of erythritol present.

Abstract: A processor includes an instruction memory, arithmetic logic unit, finite field arithmetic unit, at least one digital storage device, and an instruction decoder. The instruction memory temporarily stores an instruction that includes at least one of: an operational code, destination information, and source information. The instruction decoder is operably coupled to interpret the instruction to identify the arithmetic logic unit and/or the finite field arithmetic unit to perform the operational code of the corresponding instruction. The instruction decoder then identifies at least one destination location within the digital storage device based on the destination information contained within the corresponding instruction. The instruction decoder then identifies at least one source location within the digital storage device based on the source information of the corresponding instruction.

Abstract: A Galois field arithmetic unit includes a Galois field multiplier section and a Galois field adder section. The Galois field multiplier section includes a plurality of Galois field multiplier arrays that perform a Galois field multiplication by multiplying, in accordance with a generating polynomial, a 1st operand and a 2nd operand. The bit size of the 1st and 2nd operands correspond to the bit size of a processor data path, where each of the Galois field multiplier arrays performs a portion of the Galois field multiplication by multiplying, in accordance with a corresponding portion of the generating polynomial, corresponding portions of the 1st and 2nd operands. The bit size of the corresponding portions of the 1st and 2nd operands corresponds to a symbol size of symbols of a coding scheme being implemented by the corresponding processor.