Patents by Inventor Scott D. Stull

Scott D. Stull has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11889695
    Abstract: A device comprises an array of elevationally-extending transistors and a circuit structure adjacent and electrically coupled to the elevationally-extending transistors of the array. The circuit structure comprises a stair step structure comprising vertically-alternating tiers comprising conductive steps that are at least partially elevationally separated from one another by insulative material. Operative conductive vias individually extend elevationally through one of the conductive steps at least to a bottom of the vertically-alternating tiers and individually electrically couple to an electronic component below the vertically-alternating tiers. Dummy structures individually extend elevationally through one of the conductive steps at least to the bottom of the vertically-alternating tiers. Methods are also disclosed.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: January 30, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Paolo Tessariol, Justin B. Dorhout, Indra V. Chary, Jun Fang, Matthew Park, Zhiqiang Xie, Scott D. Stull, Daniel Osterberg, Jason Reece, Jian Li
  • Publication number: 20220037360
    Abstract: A device comprises an array of elevationally-extending transistors and a circuit structure adjacent and electrically coupled to the elevationally-extending transistors of the array. The circuit structure comprises a stair step structure comprising vertically-alternating tiers comprising conductive steps that are at least partially elevationally separated from one another by insulative material. Operative conductive vias individually extend elevationally through one of the conductive steps at least to a bottom of the vertically-alternating tiers and individually electrically couple to an electronic component below the vertically-alternating tiers. Dummy structures individually extend elevationally through one of the conductive steps at least to the bottom of the vertically-alternating tiers. Methods are also disclosed.
    Type: Application
    Filed: October 18, 2021
    Publication date: February 3, 2022
    Applicant: Micron Technology, Inc.
    Inventors: Paolo Tessariol, Justin B. Dorhout, Indra V. Chary, Jun Fang, Matthew Park, Zhiqiang Xie, Scott D. Stull, Daniel Osterberg, Jason Reece, Jian Li
  • Patent number: 11177271
    Abstract: A device comprises an array of elevationally-extending transistors and a circuit structure adjacent and electrically coupled to the elevationally-extending transistors of the array. The circuit structure comprises a stair step structure comprising vertically-alternating tiers comprising conductive steps that are at least partially elevationally separated from one another by insulative material. Operative conductive vias individually extend elevationally through one of the conductive steps at least to a bottom of the vertically-alternating tiers and individually electrically couple to an electronic component below the vertically-alternating tiers. Dummy structures individually extend elevationally through one of the conductive steps at least to the bottom of the vertically-alternating tiers. Methods are also disclosed.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: November 16, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Paolo Tessariol, Justin B. Dorhout, Indra V. Chary, Jun Fang, Matthew Park, Zhiqiang Xie, Scott D. Stull, Daniel Osterberg, Jason Reece, Jian Li
  • Publication number: 20190081061
    Abstract: A device comprises an array of elevationally-extending transistors and a circuit structure adjacent and electrically coupled to the elevationally-extending transistors of the array. The circuit structure comprises a stair step structure comprising vertically-alternating tiers comprising conductive steps that are at least partially elevationally separated from one another by insulative material. Operative conductive vias individually extend elevationally through one of the conductive steps at least to a bottom of the vertically-alternating tiers and individually electrically couple to an electronic component below the vertically-alternating tiers. Dummy structures individually extend elevationally through one of the conductive steps at least to the bottom of the vertically-alternating tiers. Methods are also disclosed.
    Type: Application
    Filed: September 14, 2017
    Publication date: March 14, 2019
    Inventors: Paolo Tessariol, Justin B. Dorhout, Indra V. Chary, Jun Fang, Matthew Park, Zhiqiang Xie, Scott D. Stull, Daniel Osterberg, Jason Reece, Jian Li