Abstract: Systems, methods, and non-transitory computer-readable media can identify a virtual character being presented to a user within a real-time immersive environment. A first animation to be applied to the virtual character is determined. A nonverbal communication animation to be applied to the virtual character simultaneously with the first animation is determined. The virtual character is animated in real-time based on the first animation and the nonverbal communication animation.

Abstract: A method and apparatus for compressing data in a communication system by receiving uncompressed packet at a compressor of the communication system, segmenting the packet into a plurality of packet segments, estimating packet segment compression parameters for each of the plurality of packet segments and compressing the packet segments utilizing one or more of the estimated packet segment compression parameters that are estimated and adjusted based upon the signal characteristics of the uncompressed packet and a desired compression ratio.

Abstract: The method and apparatus of the present invention provides for the compression and decompression of data bursts wherein the propagation of synchronization errors is limited to a desired number of signal samples and the start of a burst boundary is identified. In accordance with the present invention, a method and apparatus are provided for compressing data in a communication system by receiving data bursts comprising a plurality of uncompressed data packets at a compressor of the communication system, generating a start of burst parameter and a packet size parameter for each of the uncompressed data packets and compressing the data packets. At the decompressor, the compressed data packets are received and when a synchronization error occurs, the packet size parameter is used to limit the propagation of the error to a desired number of samples and to restore the data burst utilizing the start of burst parameter.

Abstract: A dynamic context resource module measures a compression performance level of a most recent compressed data packet of each of a plurality of compressed signal streams to generate a signal stream compression performance level for each signal stream. Dynamic compression performance indicators are calculated from the measured signal stream compression performance levels and are stored in a dynamic context resource table. A compression parameter estimation module reads the dynamic compression performance indicators and determines if each signal stream exhibits a desired performance level. If a signal stream does not exhibit the desired performance level, the compression parameters for the signal stream are adjusted. A compressed packet generator compresses a next data packet of the signal stream based upon the adjusted compression parameters for the signal stream or the unadjusted compression parameters for the signal stream.

Abstract: The method and apparatus of the present invention provides for reduced power consumption and cost while supporting wide bandwidth signals from a large number of antennas, as is required by next generation systems. In accordance with the present invention, a method and apparatus are provided for processing data in a baseband unit in which compressed signals from remote radio units are sent directly to the switch instead of to a separate conversion device. Thereby, the local input and output bottleneck within processing devices is removed in the data path of the signals between the remote radio units and the baseband unit. This also reduces the number of ports in the switch and bandwidth requirement for the switch.

Abstract: The method and apparatus of the present invention provides for reduced power consumption and cost while supporting wide bandwidth signals from a large number of antennas, as is required by next generation systems. In accordance with the present invention, a method and apparatus are provided for processing data in a radio unit of a communication system by receiving compressed data at one or more interfaces or internal resources of a distributed switch of a radio unit, operating the distributed switch to match the interface bandwidth to the resource bandwidth and distributing the compressed data received at the one or more interfaces or internal resources to the one or more internal resources or interfaces of the radio unit through the distributed switch.

Abstract: A method and apparatus that compresses signal data to generate compressed signal data having a low latency jitter while maintaining an acceptable compression ratio and reasonable degradation, as is required by next generation systems. A method and apparatus for compressing data in a communication system by receiving uncompressed data at a compressor of the communication system, analyzing the uncompressed data at the compressor to estimate at least one compression parameter to be applied during the compression of the uncompressed data, compressing the uncompressed data utilizing the at least one estimated compression parameter, monitoring the performance level of the compressed data packet and adjusting the estimated compression parameter used to compress the uncompressed data if the compressed data packet does not exhibit a desired performance level.

Abstract: The method and apparatus of the present invention provides for the compression of signal data having a low latency jitter while maintaining a target compression ratio and reasonable degradation, as is required by next generation systems. In accordance with the present invention, a method and apparatus are provided for compressing data in a communication system by receiving uncompressed packet at a compressor of the communication system, segmenting the packet into a plurality of packet segments, calculating signal sample bit-removal information for each of the plurality of packet segments and compressing the packet segments utilizing the signal sample bit-removal information that is calculated based upon the signal characteristics of the uncompressed packet and a desired target compression ratio.

Abstract: A packet switch includes individual route tables for ports of the packet switch. Each route table is associated with a port and individually maps a destination identifier of a data packet received at the port to another port in the packet switch. In some embodiments, the packet switch routes a data packet to an intermediate device based on a destination identifier in the data packet. The intermediate device services the data packet and sends the data packet, which includes the same destination identifier, back to the packet switch. In turn, the packet switch routes the data packet to a destination device based on the destination identifier in the data packet. The destination device terminates the data packet and may further service the data packet. In this way, the packet switch routes the data packet to both the intermediate device and the destination device based on the same destination identifier.

Abstract: A packet switch routes data packets based on both packet headers and data payloads in the data packets. The packet switch receives data packets, identifies a destination port of the packet switch for each data packet based on a packet header of the data packet, and routes the data packet to the destination port. Additionally, the packet switch selects data packets among the data packets received by the packet switch based on the data payloads of the received data packets, identifies a trace port of the packet switch for each selected data packet, and routes the selected data packet to the trace port.

Abstract: A packet switching integrated circuit chip is configured to receive packets, e.g., RapidIO™-compliant packets, from a plurality of external sources, and selectively passes data in the received packets to a plurality of external recipients. The chip is configured to pass first received packets without modification and to terminate second received packets and preprocess payloads thereof to produce new packets. The chip may be configured to perform signal sample processing operations on the second received packets, such as bit extension, bit truncation, bit reordering and/or bit arithmetic operations. The chip may be further configured to manage the first and second received packets based on destination addresses in the received packets.

Abstract: A packet switch including input ports and output ports allocates an output bandwidth of each output port among virtual channels based on bandwidth allocations values corresponding to the virtual channels and a bandwidth precision value of the output port. The bandwidth precision value indicates a number of bandwidth precision bits, which may be outside a bandwidth reservation precision range specified in a serial RapidIO standard. The packet switch receives data packets compliant with the serial RapidIO standard at the input ports, identifies an output port for each data packet, and selects input ports based on the output ports of the data packets. Further, the packet switch routes a data packet from each selected input port to the output port of the data packet, and the output port outputs the data packet by using the output bandwidth of the output port allocated to the virtual channel identified by the data packet.

Abstract: A packet processing integrated circuit chip includes a plurality of input ports configured to receive packets from respective external sources and a plurality of output ports configured to transmit packets to respective external recipients. The chip further includes a packet processor configurable to extract data from payloads of the received packets, to process the extracted data to produce new packets with payloads having formats compatible with data structures of the external recipients, and to convey the new packets to the output ports. The chip may further include a packet switching fabric configured to route selected packets from the input ports to selected ones of the output ports without payload modification.

Abstract: Architecture for generating and maintaining a terminal services connection from an external client to an internal intranet client behind a firewall and/or router. The external user is first authenticated after which the external client is passed to a remote user portal. A listing of available internal computers is presented to the external client user, the selection of one that initiates an intranet server to create a listening socket thereon, and a socket on the selected internal client. The server creates a thread that manages the terminal services connection between the external client and the internal client by listening for traffic and forwarding the traffic between the ports.

Abstract: A packet switch routes data packets based on both packet headers and data payloads in the data packets. The packet switch receives data packets, identifies a destination port of the packet switch for each data packet based on a packet header of the data packet, and routes the data packet to the destination port. Additionally, the packet switch selects data packets among the data packets received by the packet switch based on the data payloads of the received data packets, identifies a trace port of the packet switch for each selected data packet, and routes the selected data packet to the trace port.

Abstract: Disclosed is a system for lifting a wheelchair into and out of a vehicle. A bearing mount is fixed to the vehicle rotationally captures a pivot rod to which a rear mounting plate is fixed. Two pairs of parallel arms are pivotally fixed between the rear mounting plate and a front mounting plate, such that the arms and mounting plates form a parallelogram therebetween. A pair of forks are horizontally mounted to the forward mounting plate and are adapted to engage a pair of horizontal fork receivers that are fixed to the wheelchair. At least one vertical linear actuator is fixed between the mounting plates and is adapted to selectively raise and lower the forward mounting plate and forks with respect to the vehicle. At least one horizontal linear actuator is fixed between the vehicle and the rear mounting plate. The horizontal linear actuator is adapted to selectively rotate the forward mounting plate, arms, and the pair of forks between the inside and outside positions.

Abstract: A packet processing integrated circuit chip includes a plurality of input ports configured to receive packets from respective external sources and a plurality of output ports configured to transmit packets to respective external recipients. The chip further includes a packet processor configured to process the received packets to generate new packets with new payloads according to selected ones of a plurality of packet processing scenarios based on destination addresses in the received packets. The plurality of packet processing scenarios may include individual packet processing scenarios and group packet processing scenarios that invoke parallel processing of a packet by selected ones of the individual packet processing scenarios. The chip may further include a packet switching fabric configured to route selected packets from the input ports to selected ones of the output ports without payload modification.

Abstract: A packet processing integrated circuit chip includes a plurality of input ports configured to receive packets from respective external sources and a plurality of output ports configured to transmit packets to respective external recipients. The chip further includes a packet processor configurable to extract data from payloads of the received packets, to process the extracted data to produce new packets with payloads having formats compatible with data structures of the external recipients, and to convey the new packets to the output ports. The chip may further include a packet switching fabric configured to route selected packets from the input ports to selected ones of the output ports without payload modification.

Abstract: A packet switching integrated circuit chip is configured to receive packets, e.g., RapidIO™-compliant packets, from a plurality of external sources, and selectively passes data in the received packets to a plurality of external recipients. The chip is configured to pass first received packets without modification and to terminate second received packets and preprocess payloads thereof to produce new packets. The chip may be configured to perform signal sample processing operations on the second received packets, such as bit extension, bit truncation, bit reordering and/or bit arithmetic operations. The chip may be further configured to manage the first and second received packets based on destination addresses in the received packets.

Abstract: An apparatus for scheduling transmission of a plurality of frames in a network having a plurality of nodes, each frame identified by a type designation, includes a schedule memory and a sequencer. The schedule memory stores a transmission time for each frame type and a list of frames to be transmitted. The sequencer is operable to access the schedule memory and initiate transmission of the frames in the list.