Abstract: DC-DC power converter control comprises current starved delay lines for phase shifting control signals that set and reset a RS flip-flop to provide controllable PWM pulse widths from narrow to wide at a clock frequency. Precise pulse width control and a guaranteed minimum pulse width for pulse frequency modulation (PFM) control the DC-DC power converter during low power demand is also provided. PFM control maintains the same pulse width while decreasing the number of pulses per second when the output voltage exceeds an upper value and increases the number of pulses per second when the output voltage is less than a lower value. Voltage-to-current converters provide control currents to the current starved delay lines that provide the control signals to the SET and RESET inputs of the RS flip-flop. A D-flip-flop may further be used to improved circuit operation when generating high duty cycle (>50 percent) pulse widths.

Abstract: DC-DC power converter control comprises current starved delay lines for phase shifting control signals that set and reset a RS flip-flop to provide controllable PWM pulse widths from narrow to wide at a clock frequency. Precise pulse width control and a guaranteed minimum pulse width for pulse frequency modulation (PFM) control the DC-DC power converter during low power demand is also provided. PFM control maintains the same pulse width while decreasing the number of pulses per second when the output voltage exceeds an upper value and increases the number of pulses per second when the output voltage is less than a lower value. Voltage-to-current converters provide control currents to the current starved delay lines that provide the control signals to the SET and RESET inputs of the RS flip-flop. A D-flip-flop may further be used to improved circuit operation when generating high duty cycle (>50 percent) pulse widths.

Abstract: A power converter includes a buck leg circuit connected between a voltage input of the power converter and ground, a boost leg circuit connected between a voltage output of the power converter and ground, an inductor connected between the buck leg circuit and the boost leg circuit, an error amplifier configured to compare the voltage output of the power converter against a reference voltage to yield a feedback signal, and a control circuit. The control circuit is configured to generate a reference buck ramp configured to be compared against the feedback signal to determine whether to operate the buck leg circuit in buck mode, and to generate a reference boost ramp by superposing a variable boost ramp portion on to the reference buck ramp, the reference boost ramp configured to be compared against the feedback signal to determine whether to operate the boost leg circuit in boost mode.

Abstract: A power converter includes a buck leg circuit connected between a voltage input of the power converter and ground, a boost leg circuit connected between a voltage output of the power converter and ground, an inductor connected between the buck leg circuit and the boost leg circuit, an error amplifier configured to compare the voltage output of the power converter against a reference voltage to yield a feedback signal, and a control circuit. The control circuit is configured to generate a reference buck ramp configured to be compared against the feedback signal to determine whether to operate the buck leg circuit in buck mode, and to generate a reference boost ramp by superposing a variable boost ramp portion on to the reference buck ramp, the reference boost ramp configured to be compared against the feedback signal to determine whether to operate the boost leg circuit in boost mode.

Abstract: A sample and hold circuit takes a sample of the current flowing through an inductor of a buck switched-mode power supply (SMPS) at substantially the middle of the low side portion (50 percent point during low side switch ON) of the pulse width modulation (PWM) period. This sample of the current through the SMPS inductor during the low side ON 50% point may be considered as the “average” or “DC output” current of the SMPS, and taken every time at precisely the same low side ON 50%. A constant current source and sink are used to charge and discharge a timing capacitor whose voltage charge is monitored by a high speed voltage comparator to provide precise sample timing.

Abstract: An integrated circuit device is configured to drive multiple LED strings. The device includes a switch mode power supply control circuit configured to generate primary and secondary power transistor control signals and receive at least one current sense signal and an output voltage sense signal. The device also includes an output compare circuit configured to generate a plurality of pulse width modulated signals and a logic circuit configured to generate signals for selecting a reference voltage and for activating an absorber mode. The signal for activating an absorber mode is to be shared with the secondary power transistor control signal. The logic circuit is to be synchronized with the output compare module.

Abstract: A switching circuit including a transformer having a primary and a secondary side; a first MOSFET switch coupled with the primary side; a primary current sensing device; a second MOSFET switch coupled with the secondary side; a secondary current sensing device; and a control circuit for driving the first and second MOSFET switches, wherein first and second switch are complementarily driven and wherein switching of the first and second MOSFET switches is controlled by the primary and secondary current sensing devices.

Abstract: A sample and hold circuit takes a sample of the current flowing through an inductor of a buck switched-mode power supply (SMPS) at substantially the middle of the low side portion (50 percent point during low side switch ON) of the pulse width modulation (PWM) period. This sample of the current through the SMPS inductor during the low side ON 50% point may be considered as the “average” or “DC output” current of the SMPS, and taken every time at precisely the same low side ON 50%. A constant current source and sink are used to charge and discharge a timing capacitor whose voltage charge is monitored by a high speed voltage comparator to provide precise sample timing.

Abstract: An integrated circuit device is configured to drive multiple LED strings. The device includes a switch mode power supply control circuit configured to generate primary and secondary power transistor control signals and receive at least one current sense signal and an output voltage sense signal. The device also includes an output compare circuit configured to generate a plurality of pulse width modulated signals and a logic circuit configured to generate signals for selecting a reference voltage and for activating an absorber mode. The signal for activating an absorber mode is to be shared with the secondary power transistor control signal. The logic circuit is to be synchronized with the output compare module.

Abstract: A sample and hold circuit takes a sample of the current flowing through an inductor of a buck switched-mode power supply (SMPS) at substantially the middle of the low side portion (50 percent point during low side switch ON) of the pulse width modulation (PWM) period. This sample of the current through the SMPS inductor during the low side ON 50% point may be considered as the “average” or “DC output” current of the SMPS, and taken every time at precisely the same low side ON 50%. A constant current source and sink are used to charge and discharge a timing capacitor whose voltage charge is monitored by a high speed voltage comparator to provide precise sample timing.

Abstract: A switch mode power supply (SMPS) converter is periodically run backwards by using a synchronous switch instead of the normally used commutating diode. By running the SMPS converter backwards the SMPS output capacitor can be discharged very quickly to provide a fast turn off of (no current through) the LED's, thereby solving the color shift problem. This enables positioning the output voltage of the SMPS up or down by actively charging or discharging the bulk output capacitor. Having the capability of actively charging or discharging the bulk output capacitor allows generation of a current source comprising substantially square, e.g., substantially full current when on and substantially no current when off, current pulses that are preferable for driving LED lighting applications.

Abstract: A sample and hold circuit takes a sample of the current flowing through an inductor of a buck switched-mode power supply (SMPS) at substantially the middle of the low side portion (50 percent point during low side switch ON) of the pulse width modulation (PWM) period. This sample of the current through the SMPS inductor during the low side ON 50% point may be considered as the “average” or “DC output” current of the SMPS, and taken every time at precisely the same low side ON 50%. A constant current source and sink are used to charge and discharge a timing capacitor whose voltage charge is monitored by a high speed voltage comparator to provide precise sample timing.

Abstract: A pulse width modulation (PWM) power conversion system has improved efficiency over a wide operating input voltage and load range. Being able to measure relative efficiency of an analog PWM system allows enhanced control while maintaining the benefits of analog control. An analog low pass filter produces an average value of the PWM pulse train, then this analog average value is converted into digital values with an analog-to-digital converter and stored so that relative efficiencies of the PWM power conversion system may be compared for various combinations of operating parameters.

Abstract: An intelligent pulse width modulation (PWM) controller adapts a switch mode power supply (SMPS) system's operating parameters to optimize efficiency, remove hot spots and isolate faults by integrating a microcontroller, PWM digital circuits and analog circuits into a single integrated circuit, thereby reducing the number of external connections, silicon die area and integrated circuit packages. A communications interface is used to communicate with a host system for monitoring operating parameters of the SMPS, e.g., current, voltage, efficiency, operating temperature, diagnostics, etc. In addition, the communications interface may be used to alter the operating parameters (objectives) of the SMPS during operation thereof.

Abstract: An analog closed-loop, negative feedback system that adapts feedback compensation during operation thereof to improve dynamic performance thereof. Using a pure analog control loop with digital assist provides speed and simplicity of an analog control loop with the flexibility of digital control. Adapting the compensation allows the system to accurately predict and adjust, at all DC operating points, (1) the margin of stability of the converter, against closed loop oscillation, and (2) the frequency-domain and time-domain responses to perturbations in the input voltage and/or the output current. Operational transconductance amplifiers (OTAs) and digitally controlled digital-to-analog converters (IDACs) are used to dynamically change the operating parameters of the analog closed-loop of the negative feedback system. The negative feedback system may be a switch mode power supply (SMPS).

Abstract: The regulated output voltage of a voltage regulator is maintained up to a current limit, Ilimit, then as the load impedance continues to decrease the output current does not increase past the current limit, Ilimit, but rather the output voltage decreases forcing the output current to also decrease to satisfy Ohm's Law: IOUT=VOUT/ZLoad. When the output voltage drops below the regulated voltage value because of current limiting the voltage regulator shifts from a current limit mode to a current foldback mode wherein the output current decreases with the decrease in output voltage until the output current reaches a current foldback minimum, Ifoldback, at an output voltage of substantially zero volts. As the load impedance increases so will the output voltage and current until the output voltage is back at substantially the regulation voltage value, and the output current is less than or equal to the current limit, Ilimit.

Abstract: A high voltage switching regulator has significantly reduced current sensing delay between measurement of input current and generation of sensed current values, while maintaining good accuracy of the current through a power transistor using current replication and a current conveyor. High sensing accuracy of the input current ensures good load regulation, and low sensing delay ensures fixed duty cycle over a wide range of output currents and high input to output voltage ratios. A current conveyor is used to transfer high side current values to low side control circuits, e.g., pulse width modulation (PWM) control. The current conveyor is always on, e.g., some current flow is always present, thus minimizing any current measurement delay. This is accomplished by dynamically biasing the current conveyor by draining to ground a current equal to the sensed current. Wherein balancing of the current conveyor is ensured and offset at the input of the current conveyor is minimized.

Abstract: An intelligent pulse width modulation (PWM) controller adapts a switch mode power supply (SMPS) system's operating parameters to optimize efficiency, remove hot spots and isolate faults by integrating a microcontroller, PWM digital circuits and analog circuits into a single integrated circuit, e.g., a mixed signal device, thereby reducing the number of external connections, silicon die area and integrated circuit packages. A lossless inductor current sense technique integrates a matched, tunable complimentary filter with the intelligent SMPS controller for accurately measuring current through the power inductor of the SMPS without introducing losses in the power circuit. The complimentary filter is adjusted by the microcontroller to significantly reduce the effects of component tolerances, accurately measuring the power inductor current for precise closed loop control and over current protection.

Abstract: A switching circuit including a transformer having a primary and a secondary side; a first MOSFET switch coupled with the primary side; a primary current sensing device; a second MOSFET switch coupled with the secondary side; a secondary current sensing device; and a control circuit for driving the first and second MOSFET switches, wherein first and second switch are complementarily driven and wherein switching of the first and second MOSFET switches is controlled by the primary and secondary current sensing devices

Abstract: An intelligent pulse width modulation (PWM) controller adapts a switch mode power supply (SMPS) system's operating parameters to optimize efficiency, remove hot spots and isolate faults by integrating a microcontroller, PWM digital circuits and analog circuits into a single integrated circuit, thereby reducing the number of external connections, silicon die area and integrated circuit packages. A lossless inductor current sense technique integrates a matched, tunable complimentary filter with the intelligent SMPS controller for accurately measuring current through the power inductor of the SMPS without introducing losses in the power circuit. The complimentary filter is adjusted by the microcontroller to significantly reduce the effects of component tolerances, accurately measuring the power inductor current for precise closed loop control and over current protection.